Introduction to Operating Systems
What is Direct Memory Access (DMA)
and
Why Should We Know About it?
John Franco
Electrical Engineering and Computing Systems
University of Cincinnati
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What is Direct Memory Access (DMA) and Why Should We ..., Exercises of Operating Systems
Hardware mechanism that allows peripheral components to transfer their I/O data directly to and from main memory without the need to involve the system ...
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Introduction to Operating Systems
What is Direct Memory Access (DMA)
and
Why Should We Know About it?
John Franco Electrical Engineering and Computing Systems University of Cincinnati
Introduction
What is Direct Memory Access? Hardware mechanism that allows peripheral components to transfer their I/O data directly to and from main memory without the need to involve the system processor. Why is Direct Memory Access important? Use of this mechanism can greatly increase throughput to and from a device, because a great deal of computational overhead is eliminated What is the downside? Hardware support is required – DMA controllers DMA “steals” cycles from the processor Synchronization mechanisms must be provided to avoid accessing non-updated information from RAM
Introduction
Elaboration DMA transfers overcome the problem of occupying the CPU for the entire time it's performing a transfer. The CPU initiates the transfer, then it executes other ops while the transfer is in progress, finally it receives an interrupt from the DMA controller when the transfer is done Hardware using DMA: disk drives, graphics cards, network cards, sound cards DMA can lead to cache coherency problems If a CPU has a cache and external memory, then the data the DMA controller has access to (stored in RAM) may not be updated with the correct data stored in the cache.
Introduction
Overview (input example)
- software: asks for data (e.g. read called)
- Device driver allocates a DMA buffer, sends signal to device indicating where to send the data, sleeps
- Device writes data to DMA buffer, raises interrupt when finished
- Interrupt handler gets data from DMA buffer, acknowledges interrupt, awakens software to process the data
DMA Transfer
Overview (input example)
- hardware: asynchronously pushes data to the system May push data even if no process is listening!
- hardware raises an interrupt to announce that new data has arrived
- interrupt handler allocates a buffer, tells the hardware where to transfer the data
- device writes the data to the buffer, raises another interrupt when transfer is done
- interrupt handler dispatches the new data, awakens any relevant process, and takes care of housekeeping
DMA Transfer
Overview (input example – network transfers)
- pseudo code for read using circular buffer Err_Type Procedure read(data_type data) { if (empty_flag) return (ERR_BUF_EMPTY); else { memory(read_ptr) = data; full_flag = false; read_ptr = (((read_ptrB)+1)mod N)+B; if (read_ptr == write_ptr) empty_flag = true; return(ErrOK); } }
DMA Transfer
Graphically:
DMA Transfer
Considerations PCI:
- Must occupy contiguous pages in physical memory due to PCI bus requirement using physical addresses
- Note: other buses (e.g. Sbus) use virtual memory addresses for the transfer
- The right kind of memory must be allocated since not all memory zones are suitable: high memory may not work with some devices because of limited address space
- Memory can be allocated at boot or runtime but drivers can only allocate at runtime
Allocating a DMA Buffer
How to Allocate (low level):
- Use mem=xxx to reserve memory beginning at xxx
- done at boot Then use dmabuf = ioremap(0xFF00000, 0x100000); to create the buffer in the driver
- Allocate from the DMA zone (16 MB) struct page *buf; buf = alloc_pages(__GFP_DMA, 3); where 3 is the order and means (1 << 3) pages (from the buddy system allocator)
- Use scatter/gather I/O if the device supports it
Allocating a DMA Buffer
Creating a buffer and a bus address for the device:
- If the device has an IOMMU a set of mapping registers is provided
- A bounce buffer may be necessary – if a driver tries to perform DMA on an address that is not reachable by dev
- Cache coherency: copies of recently accessed memory areas are in cache if device writes to memory, cache area is invalidated so it will have to be paged in If device reads data from memory, cache flushed out first
- Generic DMA layer ensures all of above are not a problem over many architectures provided some rules are obeyed
Allocating a DMA Buffer
Rules for generic DMA layer – coherent mapping:
- Data type dma_addr_t represents a bus address It must not be manipulated by the driver – it can be passed to the device
- Set up the mapping (and buffer) with this: void *dma_alloc_coherent(struct device *, size_t, dma_addr_t *, int); allocates uncached, unbuffered memory for a device for performing DMA. Allocates pages, returns the CPU-viewed (virtual) address, and sets the third arg to the device-viewed address. Buffer is automatically placed where the device can get at it.
- Free the mapping with this: void dma_free_coherent(struct device *, size_t, void *, dma_addr_t);
Allocating a DMA Buffer
Rules for generic DMA layer – streaming DMA mapping:
- Buffer can only be used in the direction specified
- A mapped buffer belongs to the device, not the processor The device driver must keep hands off the buffer until it is unmapped
- A buffer used to send data to a device must contain the data before it is mapped
- The buffer must not be unmapped while DMA is still active, or serious system instability is guaranteed.
Allocating a DMA Buffer
Rules for generic DMA layer – scatter/gather mapping:
- Send contents of several buffers over DMA Could send then one at a time: map each Or with scatter/gather, can send them all at once (speed)
- Many devices can accept a scatterlist of array pointers and lengths
- But scatterlist entries must be of page size (except ends)