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Material Type: Quiz; Class: Microprocessors; Subject: Electrical & Computer Engineer; University: Boise State University; Term: Spring 2007;
Typology: Quizzes
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Processor
Program memory
Data memory
Processor
Memory
(program and data)
Harvard
Princeton
wiresFewer memory
accessdata memoryprogram andSimultaneous
Is Nios II Harvard or Princeton?
Pipelining Instruction Execution Sequence and
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Fetch-instr.
Decode
Fetch ops.
Execute
Store res.
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Dry Wash
Time
Non-pipelined
Pipelined
Time
Time
Pipelined
pipelined instruction execution
non-pipelined dish cleaning
pipelined dish cleaning
Instruction 1
No pipeline - one instruction at a time
of architectureTraditional programmer doesn’t have detailed understanding
Instead, know what instructions can be executed
To be a good computer engineer, you need to know both!
Two levels of programming:
Assembly level
Structured languages (C, C++, Java, etc.)
Most development today done using structured languages
But, some assembly level programming may still be necessary
controls (drives) another deviceDrivers: portion of program that communicates with and/or
manipulationOften have detailed timing considerations, extensive bit
Assembly level may be best for these
Embedded processors often very limited
e.g., 64 Kbytes program, 256 bytes of RAM (expandable)
Only a direct concern for assembly-level programmers
How communicate with external signals?
Assembler, Linker, ELF, and SREC