Docsity
Docsity

Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity


Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan


Guidelines and tips
Guidelines and tips

This lecture about COUNTER DESIGN, Lecture notes of Engineering

System level design of digital logic circuits using hardwired and programmable logic devices. ROMs, PROMs, and PLAs. Synchronous and asynchronous circuit design and analysis.

Typology: Lecture notes

2021/2022

Available from 12/22/2022

galaxy-a-1
galaxy-a-1 🇺🇸

13 documents

1 / 32

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
COUNTER DESIGN 1
COUNTER DESIGN
A sequential circuit that goes through a prescribed
sequence of states upon the application of input
pulses is called a counter.
The input pulses (count pulses) may be clock
pulses or they may originate from an external
source and may occur at prescribed intervals of
time or at random.
pf3
pf4
pf5
pf8
pf9
pfa
pfd
pfe
pff
pf12
pf13
pf14
pf15
pf16
pf17
pf18
pf19
pf1a
pf1b
pf1c
pf1d
pf1e
pf1f
pf20

Partial preview of the text

Download This lecture about COUNTER DESIGN and more Lecture notes Engineering in PDF only on Docsity!

COUNTER DESIGN

COUNTER DESIGN

^ A sequential circuit that goes through a prescribedsequence of states upon the application of inputpulses is called a counter. ^ The input pulses (count pulses) may be clockpulses or they may originate from an externalsource and may occur at prescribed intervals oftime or at random.

COUNTER DESIGN

COUNTER DESIGN

^ Synchronous Counters

are constructed with one

common clock signal as the input to all the flip-flops simultaneously.  Ripple Counters

are referred to as asynchronous counters. The output of one stage serves as theclock input to the next stage.

COUNTER DESIGN

COUNTER DESIGN

^ A self-starting

counter is one in which every possible state, even those not in the desired countsequence, has a sequence of transitions thateventually leads to a valid counter state. Thisguarantees that no matter how the counter startsup, it will eventually enter the proper countersequence.  A self-correcting

counter is designed so that all abnormal states have transitions leading to normalstates.

COUNTER DESIGN

EXAMPLE 1

-^ Design a MOD-6 counter to count in the followingsequence: 0,1,2,4,5,6. The counter must be selfstarting, with count state 3 leading directly tostate 4, and count state 7 leading directly to state0. Use JK flip-flops.

COUNTER DESIGN

EXAMPLE 1

COUNTER DESIGN

EXAMPLE 1

COUNTER DESIGN

EXAMPLE 1

COUNTER DESIGN

EXAMPLE 1

COUNTER DESIGN

EXAMPLE 2

-^ Design a MOD-5 counter to count in the followingsequence: 2,3,5,1,7. The counter must be selfstarting, with count states of 0,4, and 6 leadingdirectly to 2. Use JK flip-flops.

COUNTER DESIGN

EXAMPLE 2

COUNTER DESIGN

EXAMPLE 2

COUNTER DESIGN

EXAMPLE 2

COUNTER DESIGN

EXAMPLE 2

COUNTER DESIGN

EXAMPLE 3

-^ Design a MOD-5 counter to count in the followingsequence: 0,1,2,4,6. Treat the unused states asdon’t care conditions. Analyze the final circuit toensure that it is self-correcting. Use D flip-flops.