Schedule of work
Task Start Date End Date Participant
15 days Research about PCIe 2/14/2011 8:00 3/4/2011 17:00 Mohmadshahid & Sriram
15 days Research about AES 3/7/2011 8:00 3/25/2011 17:00 Mohmadshahid & Sriram
3 days 3/28/2011 8:00 3/30/2011 17:00 Mohmadshahid & Sriram
7 days Proposal Writing 3/31/2011 8:00 4/8/2011 17:00 Mohmadshahid & Sriram
10 days Figuring out the test scenarios 4/11/2011 8:00 4/22/2011 17:00 Mohmadshahid & Sriram
15 days Implementation of Key managment System 4/25/2011 8:00 5/13/2011 17:00 Sriram
10 days Simulation and Debug 5/16/2011 8:00 5/27/2011 17:00 Sriram
10 days Integrating KMS with AES core 5/30/2011 8:00 6/10/2011 17:00 Sriram
5 days Simulation and Debug 6/13/2011 8:00 6/17/2011 17:00 Sriram
5 days 6/20/2011 8:00 6/24/2011 17:00 Mohmadshahid
15 days Implementation of Data Link Layer(DLL) 6/27/2011 8:00 7/15/2011 17:00 Mohmadshahid
15 days Simulation and Debug 7/18/2011 8:00 8/5/2011 17:00 Mohmadshahid
5 days Integrating KMS with AES decyrption core 8/8/2011 8:00 8/12/2011 17:00 Mohmadshahid
10 days Integrating DLL with AES core and KMS 8/15/2011 8:00 8/26/2011 17:00 Mohmadshahid & Sriram
20 days Simulation and Debug 8/29/2011 8:00 9/23/2011 17:00 Mohmadshahid & Sriram
10 days 9/26/2011 8:00 10/7/2011 17:00 Mohmadshahid & Sriram
20 days Debug 10/10/2011 8:00 11/4/2011 17:00 Mohmadshahid & Sriram
2 days Synthesis 11/7/2011 8:00 11/8/2011 17:00 Mohmadshahid & Sriram
10 days Debug 11/9/2011 8:00 11/22/2011 17:00 Mohmadshahid & Sriram
7.5 days Final report 11/23/2011 8:00 12/2/2011 13:00 Mohmadshahid & Sriram
5 days Presentation 12/2/2011 13:00 12/9/2011 13:00 Mohmadshahid & Sriram
Number of
Days
Generating Block Diagram of Project and
specifications
Development of Logic to extract header from
TLP
Developement of Test Bench using predeveloped
test scenarios
