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Computer Organization Exam Questions, November 2007, Study notes of Computer Architecture and Organization

The questions from the computer organization exam held in november 2007 for the b.tech i semester. The exam covers topics common to electrical & electronic engineering, electronics & communication engineering, electronics & instrumentation engineering, electronics & control engineering and electronics & telematics. The exam lasts for 3 hours and has a maximum of 80 marks. Students are required to answer any five questions, with all questions carrying equal marks.

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Uploaded on 09/24/2011

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Code No: R05310201 Set No. 3
III B.Tech I Semester Regular Examinations, November 2007
COMPUTER ORGANISATION
( Common to Electrical & Electronic Engineering, Electronics &
Communication Engineering, Electronics & Instrumentation Engineering,
Electronics & Control Engineering and Electronics & Telematics)
Time: 3 hours Max Marks: 80
Answer any FIVE Questions
All Questions carry equal marks
? ? ? ? ?
1. Distinguish between error detection and correction codes. What do you understand
by odd parity and even parity?. What is odd function and even function?. To
calculate odd and even parity values which functions can be used? Calculate Odd
and even parity values for all hexadecimal digits 0-9 and A-F. [16]
2. (a) Explain about stack organization used in processors. What do you understand
by register stack and memory stack? [10]
(b) Explain how X=(A+B)/(A-B) is evaluated in a stack based computer. [6]
3. (a) How do you map micro-operation to a micro instruction address. [8]
(b) Hardwired control unit is faster than microprogammed control unit. Justify
this statement. [8]
4. (a) What is the use of fast multiplication circuits? Write about array multipliers.
[8]
(b) Multiply 10111 with 10011 using booths algorithm. [8]
5. (a) Explain how the Bit Cells are organized in a Memory Chip. [8]
(b) Explain the organization of a 1K x 1 Memory with a neat sketch. [8]
6. (a) What is Direct Memory Access? Explain the working of DMA.
(b) What are the different kinds of DMA transfers? Explain.
(c) What are the advantages of using DMA transfers? [8+4+4]
7. (a) What is pipeline? Explain. [8]
(b) Explain arithmetic pipeline. [8]
8. (a) Explain the working of 8 x 8 Omega Switching network.
(b) Explain the functioning of Binary Tree network with 2 x 2 Switches. Show a
neat sketch. [8+8]
? ? ? ? ?
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Code No: R05310201 Set No. 3

III B.Tech I Semester Regular Examinations, November 2007 COMPUTER ORGANISATION ( Common to Electrical & Electronic Engineering, Electronics & Communication Engineering, Electronics & Instrumentation Engineering, Electronics & Control Engineering and Electronics & Telematics) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ?????

  1. Distinguish between error detection and correction codes. What do you understand by odd parity and even parity?. What is odd function and even function?. To calculate odd and even parity values which functions can be used? Calculate Odd and even parity values for all hexadecimal digits 0-9 and A-F. [16]
  2. (a) Explain about stack organization used in processors. What do you understand by register stack and memory stack? [10] (b) Explain how X=(A+B)/(A-B) is evaluated in a stack based computer. [6]
  3. (a) How do you map micro-operation to a micro instruction address. [8] (b) Hardwired control unit is faster than microprogammed control unit. Justify this statement. [8]
  4. (a) What is the use of fast multiplication circuits? Write about array multipliers. [8] (b) Multiply 10111 with 10011 using booths algorithm. [8]
  5. (a) Explain how the Bit Cells are organized in a Memory Chip. [8] (b) Explain the organization of a 1K x 1 Memory with a neat sketch. [8]
  6. (a) What is Direct Memory Access? Explain the working of DMA. (b) What are the different kinds of DMA transfers? Explain. (c) What are the advantages of using DMA transfers? [8+4+4]
  7. (a) What is pipeline? Explain. [8] (b) Explain arithmetic pipeline. [8]
  8. (a) Explain the working of 8 x 8 Omega Switching network. (b) Explain the functioning of Binary Tree network with 2 x 2 Switches. Show a neat sketch. [8+8]

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