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School of Engineering and Technology June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma
Multi-Level Page Tables,
Beyond Physical Memory
Wes J. Lloyd
School of Engineering and Technology
University of Washington - Tacoma TCSS 422: OPERATING SYSTEMS
Questions from 5/
REVIEW: Memor y Segmentation Activity (available in Canvas)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
School of Engineering and Technology Daily Feedback Quiz in Canvas – Available After Each Class Extra credit available for completing surveys ON TIME Tuesday surveys: due by ~ Wed @ 11:59p Thursday sur veys: due ~ Mon @ 11:59p June 1, 2021 TCSS422: Computer Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. ONLINE DAILY FEEDBACK SURVEY June 1, 2021 TCSS422: Computer Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18.
School of Engineering and Technology
Could you review how we find hits and misses from TLB
example? (lecture 17 2up pg19)
We will start today by reviewing the TLB (chapter 19)
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. FEEDBACK - 2
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing Ju ne 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
School of Engineering and Technology
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing June 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing June 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
School of Engineering and Technology Final Exam category will have two assignments Thursday June 10 from 3:40 to 5:40 pm Final Quiz (50 points) SHORT: fewer than half the number of questions as the midterm 1-hour Focus on new content - since the midterm Tutorial: Linux File Systems and Disk I/O Available for 1-week ~June 5th^ to June 11th 50 points Presents new material in a hands-on, interactive format Complete activity and answer questions Individual work June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. ALTERNATE FINAL EXAM
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing June 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
School of Engineering and Technology
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing June 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18.
OBJECTIVES – 6/
CHAPTER 19:
TRANSLATION
LOOKASIDE BUFFER
(TLB)
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18.
School of Engineering and Technology
What factors affect the hit/miss rate?
Page size
Data/Access locality (how is data accessed?)
Sequential array access vs. random array access
Temporal locality
Size of the TLB cache
(how much history can you store?) June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. TLB EXAMPLE - 4
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing June 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
School of Engineering and Technology
CHAPTER 20:
PAGING:
SMALLER TABLES
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. Consider array-based page tables:
Each process has its own page table
32-bit process address space (up to 4GB)
With 4 KB pages
20 bits for VPN
12 bits for the page offset
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18.
LINEAR PAGE TABLES
School of Engineering and Technology
Questions from 5/
Assignment 2 – May 31 (Late Penalty June 2, Closing June 4)
Tutorial 2 – Pthread, locks, conditions tutorial – June 4
Assignment 3: (Tutorial) Introduction to Linux Kernel Modules
Final exam – alternate format
Quiz 4 – Page Tables
Chapter 19: Translation Lookaside Buffer (TLB)
Hit-to-Miss Ratios
Chapter 20: Paging: Smaller Tables
Smaller Tables, Multi-level Page Tables, N-level Page Tables
Chapter 21/22: Beyond Physical Memory
Swapping Mechanisms, Swapping Policies June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. OBJECTIVES – 6/
Larger pages = 16KB = 2^14
32-bit address space: 2^32
218 = 262,144 pages
Memory requirement cut to ¼
However pages are huge
Internal fragmentation results
16KB page(s) allocated for small programs with only a
few variables
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. PAGING: USE LARGER PAGES
School of Engineering and Technology Process: 16KB Address Space w/ 1KB pages June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. PAGE TABLES: WASTED SPACE Page Table Process: 16KB Address Space w/ 1KB pages June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. PAGE TABLES: WASTED SPACE Page Table Most of the page table is unused and full of wasted space. (73%)
School of Engineering and Technology Add level of indirection, the “page directory” June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. MULTI-LEVEL PAGE TABLES - 2 Add level of indirection, the “page directory” June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. MULTI-LEVEL PAGE TABLES - 2 Two level page table: 220 pages addressed with two level-indexing (page directory index, page table index)
School of Engineering and Technology
Advantages
Only allocates page table space in proportion to the
address space actually used
Can easily grab next free page to expand page table
Disadvantages
Multi-level page tables are an example of a time-space
tradeoff
Sacrifice address translation time (now 2-level) for space
Complexity: multi-level schemes are more complex
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. MULTI-LEVEL PAGE TABLES - 3 16KB address space, 64byte pages How large would a one-level page table need to be? 214 (address space) / 2^6 (page size) = 2^8 = 256 (pages) June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. EXAMPLE
School of Engineering and Technology 4 bits page directory index (PDI – 1st^ level) 4 bits page table index (PTI – 2nd^ level) To dereference one 64-byte memory page, We need one page directory entry (PDE) One page table Index (PTI) – can address 16 pages June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. PAGE TABLE INDEX For this example, how much space is required to store as a single-level page table with any number of PTEs? 16KB address space, 64 byte pages 256 page frames, 4 byte page size 1 ,024 bytes required (single level) How much space is required for a two-level page table with only 4 page table entries (PTEs)? Page director y = 16 entries x 4 bytes (1 x 64 byte page) Page table = 4 entries x 4 bytes (1 x 64 byte page) 128 bytes required (2 x 64 byte pages) Savings = using just 12.5% the space !!! June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18. EXAMPLE - 3
School of Engineering and Technology Consider: 32-bit address space, 4KB pages, 2^20 pages Only 4 mapped pages Single level: 4 MB (we’ve done this before) Two level: (old VPN was 20 bits, split in half) Page director y = 2^10 entries x 4 bytes = 1 x 4 KB page Page table = 4 entries x 4 bytes (mapped to 1 4KB page) 8KB (8,192 bytes) required Savings = using just .78 % the space !!! 100 sparse processes now require < 1MB for page tables June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18.
32-BIT EXAMPLE
WE WILL RETURN AT
4:50PM
June 1, 2021 TCSS422: Operating Systems [Spring 2021] School of Engineering and Technology, University of Washington - Tacoma L18.
