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Target Code Addresses - Compiler Design - Lecture Slides | CIS 631, Study notes of Computer Science

Syracuse UniversityComputer Science

Material Type: Notes; Class: Compiler Design; Subject: Computer & Info Science; University: Syracuse University; Term: Unknown 1989;

Typology: Study notes

Pre 2010

Uploaded on 08/09/2009

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Code Generation
• Instruction Selection
– Can be a simple translation of three address instruction to target code
x = y + z becomes lw $t0, y
lw $t1, z
add $t2, $t0, $t1
sw $t2, x
• Concepts of code generation, register allocation and
optimization are introduced
• Algorithm for generating code for arithmetic expressions using
a minimal number of registers
pf3
pf4
pf5
pf8
pf9
pfa
pfd
pfe
pff
pf12

Partial preview of the text

Download Target Code Addresses - Compiler Design - Lecture Slides | CIS 631 and more Study notes Computer Science in PDF only on Docsity!

Code Generation

•^

Instruction Selection^ –

Can be a simple translation of three address instruction to target code

x = y + z

becomes

lw

$t0, y

lw

$t1, z

add

$t2, $t0, $t

sw

$t2, x

•^

Concepts of code generation, register allocation andoptimization are introduced

•^

Algorithm for generating code for arithmetic expressions usinga minimal number of registers

Target Code Addresses •^

Four areas of memory: Code, Static, Heap and Stack

•^

Can use one static base location for Code and Static variablearea^ –

procedures have a location (offset) of the code in this area

-^

global variables allocated in the static area also given offsets here

•^

Other program variables, local variables and formalparameters, are given offset locations with regard to a stackactivation record pointer

Example of Basic blocks psuedo code to initialize a 10 by 10array to be the identity matrix,for i from 1 to 10 do

for j from 1 to 10 do

a[i, j] = 0.

for i from 1 to 10 do

a[i, j] = 1.

Three address code, assuminga is the starting address of thearray in row-major form andthat each element takes 8 byteseach:

i = 1

leader

j = 1

leader

t1 = 10 * i

leader

t2 = t1 + j

t3 = 8 * t

t4 = t3 – 88

a[t4] = 0.

j = j + 1

if j <= 10 goto 3.

  1. i = i + 1

leader

  1. if i <= 10 goto 2.12. i = 1

leader

  1. t5 = i – 1

leader

  1. t6 = 88 * t515. a[t6] = 1.016. i = i + 117. if i <= 10 goto 13.

Graph Representation •^

Basic blocks connected byedges representing jumps

•^

add an entry and exit point

•^

can also identify set ofnodes as a loop^ –

loop entry is only node withpredecessor outside the loop

-^

every node in the loop has apath to the entry

B1:

i = 1

B2:

j = 1

B3:

t1 = 10 * It2 = t1 + jt3 = 8 * t2t4 = t3 – 88a[t4] = 0.0j = j + 1if j <= 10 goto B3.

B4:

i = i + 1if i <= 10 goto B2.

B5:

i = 1

B6:

t5 = i – 1t6 = 88 * t5a[t6] = 1.0i = i + 1if i <= 10 goto B6.

Good Code Generation for Basic Blocks •^

Some local optimization can be achieved by building a DAGrepresentation of the basic block^ –

node for each instruction in the block whose children are the previousstatements giving the last definition of the operands

•^

Eliminate local common subexpressions^ –

check if there are nodes with the same operator and the same children

•^

Dead code elimination^ –

if there is a node with no ancestors and with no live variables, then thatnode can be eliminated

•^

Algebraic identities^ –

arithmetic identities (e.g. x – 0 = x = x + 0 = 0 + x …)

-^

reduction in strength, replacing expensive operations with cheaper ones(e.g. x

2

= x * x, 2 * x = x + x)

–^

constant folding - evaluate constant expressions at compile time (e.g. 2* 3.14)

Simple code generation •^

Generates code considering just one basic block, butintroduces the ideas of register allocation

•^

assume that we keep information about registers^ –

register descriptor keeps track of which variable names have acurrent value in that register

-^

address descriptor for each program variable keeps track of wherethe current value of the variable can be found

•^

GetRegister function gets an appropriate register for anyoperand of the TAC

•^

For the instruction x = y + z^ –

call GetRegister for each of the operands

  • if y is not already in its register:

lw Ry, y

  • if z is not already in its register:

lw Rz, z

  • give the instruction

add Rx, Ry, Rz

GetRegister function •^

Pick a register Ry for any variable y that is an operand^ –

if y is already in a register, pick it (no load instruction needed)

-^

if y is not in a register, but one is free, pick that register (and load it)

-^

if y is not in a register but there is not register free, consider candidateregisters R

  • any register with a variable v, whose descriptor says its current

value is in memory already

  • any register with the variable x, the result of the instruction, and x

is not also one of the operands (x will be rewritten anyway)

  • any register with a variable v that is not used later• otherwise, generate a store instruction sw R, v to “spill” v• repeat these steps for other variables in the register, and pick a

register with the fewest number of stores

•^

Pick a register Rx for the variable x that is the result

  • in addition to above: any register holding only x• if y is not used later, use Ry to hold the result Rx (e.g. x = y )

Peephole Optimization •^

Another strategy is to generate naïve code and then improvethe quality of the target code by simple optimizations^ –

sliding window of instructions (peephole) to examine

•^

Redundant loads and stores

•^

Eliminating unreachable code^ –

example: eliminate jumps over jumps

•^

Flow of control optimizations – analyze jump sequences

•^

Algebraic simplification and reduction in strength

Register Allocation by graph coloring

•^

Technique for allocating registers and managing memory spills

•^

First pass of algorithm allocates variables to registers as if therewere no limit – generates code with symbolic registers

•^

Second pass assigns physical registers to symbolic ones andminimizes the cost of spills^ –

A register-interference graph is constructed

  • nodes are symbolic registers and an edge connects two nodes if one

is live at a point where the other is defined

–^

Try to color the graph with k colors, where k is the # of registers

  • a coloring assigns a color to each node so that no two adjacent nodes

have the same color

  • graph coloring is an NP-complete problem, but effective heuristic

algorithms exist

–^

If the graph cannot be colored for k registers, choose a register to “spill”

Optimal Code Generation for Expressions

•^

Generate code one expression at a time, instead of basic blocks

•^

Assign numbers to the expression tree (as in the abstract syntaxtree)^ –

known as Sethi-Ullman numbers, or Ershov numbers

•^

Label the expression tree:^ –

label any leaf 1

-^

label of an interior node with one child is the label of its child

-^

label of an interior node with two children is

  • larger of the two children, if the children have different labels• 1 + label of a child, if the labels are the same

•^

Given machine model where all operands must be in registers,can prove that the label of a node is the fewest number ofregisters with which the expression can be evaluated with nostores

Generating Code from Labeled Expressions

–^

if an interior node has two children with unequal labels

  • generate code for the big child (label k), with base b, result is in

b + k -

  • generate code for the smalle child (label m < k), using register

base b, result is in b + m-

  • generate instruction:

op Rb+k-1, Rb+m-1, Rb+k-

–^

For a leaf representing x, with base register b, generate:

lw Rb

x

Labeled Expressions with Register “Spill” •^

If there are not at least k registers in previous algorithm^ –

insert some store instructions to spill register values into memory

•^

Augment previous algorithm – save results of one child^ –

for an interior node with a child whose label < r (#registers)

-^

generate code for the big child, using base register 1, result will bein register r

-^

generate instruction sw Rr, tk, where tk is a temporary memorylocation used to evaluate nodes with label k

-^

generate code for the little child. If the label is r or greater, use base= 1. If the label is j < r, use base = r-j, result appears in Rr

-^

generate instruction lw Rr-1, tk

-^

generate node instruction:

op Rr, Rr, Rr-1 (or op Rr, Rr-1, Rr)