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Solved Final Exam for Digital Electronics Circuit Design | ECEN 4303, Exams of Electrical and Electronics Engineering

Material Type: Exam; Professor: Johnson; Class: DIG ELTRNC CIRC DESIGN; Subject: Electrical and Computer Engineering ; University: Oklahoma State University - Stillwater; Term: Fall 2008;

Typology: Exams

2010/2011

Uploaded on 07/18/2011

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ECEN 4303 Fall 2008 FINAL EXAM WRITE YOUR NAME HERE A dena All questions must be answered on test paper! Open Book, Open Notes 1. Draw a transistor level diagram (use the ic C symbols) (no stick diagram) for the implementation of Y= (A+B)C+D You may assume that AABB,C,C,D,D are available to use as inputs if necessary. Hint: you may have to rearrange the logic equation to get it to fit the gate type. a, asa combination of CMOS gates with no more than 2 inputs 4, Dap? sap i_¢ B A _, - ~o hy _ & & 8 _ 6 ye pi \ ECEN 4363 Fail 2008 FINAL EXAM December 11, 2008 page 1 of 6