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Features of 80186, 80286,
and
Pentium family processors
80186 Basic Features
The 80186 contains 16 – bit data bus
The internal register structure of 80186 is
virtually identical to the 8086
About the only difference is that the 80186
contain additional reserved interrupt vectors
and some very powerful built-in I/O features
Timers:
The timer section contains three fully
programmable 16-bit timers
The timers 0 and 1 generate wave-forms for
external use and driven by either the master
clock of the 80186 or by an external clock
The third timer, timer 2 is internal and clocked
by the master clock
Programmable DMA Unit:
The programmable DMA unit contains two
DMA channels, or four DMA channels in
some models
Each channel can transfer data between
memory locations, between memory and IO,
or between IO devices
Power save/Power Down Feature :
The power save feature allows the system
clock to be divided by 4, 8, or 16 to reduce
power consumption
The power saving feature is started by
software and exited by a hardware event
such as an interrupt
Refresh Control Unit:
The refresh control unit generates the refresh
row address at the interval programmed
Like the 80186, the 80286 doesn’t incorporate internal peripherals; instead it contains a memory- management unit (MMU) The 80286 operates in both the real and protected modes In the real mode, the 80286 addresses a 1MByte memory address space and is virtually identical to 8086 In the protected mode, the 80286 addresses a 16MByte memory space
The clock is provided by the 82284 clock
generator, and the system control signals are
provided by the 82288 system bus controller
The 80286 contains the same instructions
except for a handful of additional instructions
that control the memory-management nit
The 80386 is operated in the pipelined mode, it
sends the address of the next instruction or
memory data to the memory system prior to
completing the execution of the current
instruction
This allows the memory system to begin fetching
the next instruction or data before the current is
completed
This increases access time, thus reducing the
speed of the memory
The I/O structure of the 80386 is almost identical to the 80286, except that I/O can be inhibited when the 80386 is operated in the protected mode through the I/O bit protection map The register set of the 80386 contains extended versions of the registers introduced on the 80286 microprocessor. These extended registers include EAX, EBX, ECX, EDX, EBP, ESP, EDI, ESI, EIP and EFLAGS The instruction set of the 80386 is enhanced to include instructions that address the 32-bit extended register set
The real mode allows the microprocessor to
address data in the first 1MByte of memory
In the protected mode, 80386 addresses any
location in its 4G bytes of physical address
space
80486 Basic Features
The 80486 microprocessor is an improved
version of the 80386 microprocessor that
contains an 8K-byte cache and an 80387
arithmetic co processor; it executes many
instructions in one clocking period
The 80486 microprocessor executes a few
new instructions that control the internal
cache memory
Pentium Processor basic features
The Pentium microprocessor is almost identical to the earlier 80386 and 80486 microprocessors The main difference is that the Pentium has been modified internally to contain a dual cache (instruction and data) and a dual integer unit The Pentium also operates at a higher clock speed of 66 MHz
The data bus on the Pentium is 64 – bits wide
and contains eight byte-wide memory banks
selected with bank enable signals
Memory access time, without wait states, is
only about 18 ns in the 66 MHz Pentium
The superscalar structure of the Pentium
contains three independent processing units:
a floating point processor and two integer
processing units