

Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Community
Ask the community for help and clear up your study doubts
Discover the best universities in your country according to Docsity users
Free resources
Download our free guides on studying techniques, anxiety management strategies, and thesis advice from Docsity tutors
Material Type: Lab; Class: Senior Project; Subject: Electrical & Computer Engineer; University: Lafayette College; Term: Fall 2006;
Typology: Lab Reports
1 / 2
This page cannot be seen from the preview
Don't miss anything!
ECE 491 – Senior Design 1 Laboratory 5 – RS-232 Serial Receiver September 28, 2006
Introduction
In this lab you will design and implement a serial receiver. It is more complex that the serial transmitter because it requires that you synchronize with an incoming signal and sample successive bits. Your design will probably consist of a shift register, one or more counters (used to generate delays), and a control unit that ties it all together.
Lab Preparation and Design
We will design the serial receiver assuming a clock rate that is 16 times the baud rate. The receiver circuit must implement the following steps:
Your asynchronous serial receiver should have the following inputs and outputs:
RXD Asynchronous Serial Rcvr.
DATA
RDY
FERR
CLOCK
8
RXD is the serial data input. DATA is the parallel data output. RDY should be asserted when a character has been received, and FERR should be asserted when a character has been received but the value of the stop bit was not correct (FERR and RDY should remain asserted until a new start bit is detected).
In the Lab
Report
For your lab report hand in the following:
learned, and (c) what difficulties you encountered.