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A quiz from a university course in computer science, specifically cs150 in spring 1998. The quiz covers logic design and includes questions on constructing karnaugh maps, minimizing boolean expressions, and implementing functions using various gate types. Students are required to find the minimum sum-of-products and product-of-sums realizations, identify static-1 hazards, and implement functions using different gate types and a pla.
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Your Name: _______________________________________Discussion Section_________________
Quiz 1 Page 1 of 6 CS 150 - Sp. 98
CS150 Spring 1998
Room 10 Evans Hall, 2:10pm Tuesday February 24 (Open Katz only, Calculators OK, 1hr 20mins) Include all final answers in locations indicated on these pages. Use space provided for all working. If necessary, attach additional sheets by staple at the end. BE SURE TO WRITE YOUR NAME ON EVERY SHEET.
(1) (20pts) Consider the following logic function
(a) Construct a Karnaugh Map and write the Boolean expression for the function as a minimum sum-of-products realization (minimum number of (gates + gate inputs.)) Indicate the specific implicants you have chosen to implement each function by circling them on the maps.
1(a) 5pts
f(A,B,C,D) = _______________________
(b) Construct a Karnaugh Map and write the Boolean expression for the function as a minimum product-of-sums realization (minimum number of (gates + gate inputs.)) Indicate the specific implicants you have chosen to implement each function by circling them on the maps.
1(b) 5pts
f(A,B,C,D) = _______________________
CS 150 - Sp. 98 Page 2 of 6 Quiz 1
write the Boolean expression for the function as a minimum sum-of-products realization
1(c)5pts
f 1 (A,B,C,D) = _______________________
d) How many static-1 hazards are there in your minimum sum-of-products realization? How would you change your circuit to remove them?
1(d)5pts # hazards=________________
My fix is (describe and illustrate on K-map):
Additional space for Problem 1
CS 150 - Sp. 98 Page 4 of 6 Quiz 1
(c) 2 input NOR gates
2(c) (5pts)
(d) an AND/OR PLA
2(d) (5pts)
(e) If the function were implemented using a ROM, how many ROM storage locations would be required? How many address input lines would the ROM have?
2(e) (5pts) Storage Locations: _________ Address inputs: _________
Additional space for Problem 2
Your Name: _______________________________________Discussion Section_________________
Quiz 1 Page 5 of 6 CS 150 - Sp. 98
(3) (20pts) Given the ROM-based FSM below,
(a) draw the waveforms for Q1, Q0, and OUT. You may assume that the clock period is long compared to the gate delays in the components.
A2 A1 A0 F2 F1 F 0 0 0 1 0 1 0 0 1 0 1 1 0 1 0 1 1 1 0 1 1 1 1 0 1 0 0 1 0 1 1 0 1 0 0 0 1 1 0 1 1 1 1 1 1 1 0 0