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CSC425 Review: CPU Architecture and Instruction Sets - Prof. Gary Locklair, Study notes of Computer Science

Material Type: Notes; Professor: Locklair; Class: Senior Seminar; Subject: Computer Science; University: Concordia University - Wisconsin; Term: Fall 2006;

Typology: Study notes

Pre 2010

Uploaded on 07/23/2009

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11 October Day 14
CSC425 review
I. CPU
A. ALU
B. CU
C. Cache
A. ALU – arithmetic/logic unit
performs processing
contains circuitry to add, etc
issues: representation of numbers
base 2 binary form
1. integers – works well, except for … negative values as no way to
have a (-) sign in a bit!
a. signed magnitude
+3 +(-2) =
b. one’s complement
c. two’s complement
2. reals / floats
SES implementation – no way to have a (.) radix (decimal) point in a
bit!
B. CU – control unit
runs S/W
manager of system
1. instruction cycle
a. Fetch
b. Decode
c. Execute
2. Instruction sets
CSC 490 Course Notes and Outline, © Dr. Gary Locklair, Fall 2006
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11 October Day 14 CSC425 review I. CPU A. ALU B. CU C. Cache A. ALU – arithmetic/logic unit performs processing contains circuitry to add, etc issues: representation of numbers base 2 binary form

  1. integers – works well, except for … negative values as no way to have a (-) sign in a bit! a. signed magnitude +3 +(-2) = b. one’s complement c. two’s complement
  2. reals / floats SES implementation – no way to have a (.) radix (decimal) point in a bit! B. CU – control unit runs S/W manager of system
  3. instruction cycle a. Fetch b. Decode c. Execute
  4. Instruction sets CSC 490 Course Notes and Outline, © Dr. Gary Locklair, Fall 2006

a. CISC b. RISC

  1. Addressing a. number (i) 3 address machine ADD Z, Y, X [Z  Y + X] (ii) 2 address machine ADD Y, X [Y  Y + X] (iii) 1 address machine (accumulator) ADD X [accumulator  accumulator + X] (iiii) 0 address machine (stack) ADD X [pop; add X; push] b. modes (i) immediate – operand is data value (ii) direct – operand is memory address of value (iii) indirect – operand is memory address of memory address of value C. Cache high-speed memory onboard CPU not visible (or usable by) to programmer works via “locality of reference” CSC 490 Course Notes and Outline, © Dr. Gary Locklair, Fall 2006