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3. Value field

It is used to hold the value of

the instruction result until the

instruction commits.

Reorder Buffer Fields

4. Ready field

It indicates that the instruction

has completed execution and

the value is ready.

Reorder Buffer Fields

If not free then stall issue

If operands are available then

send them to the reservation

station

Else keep track of ROB entry

that will produce the operands

Issue con’t…

2. Execute

Operate on operands (EX)

If both operands ready then execute

If not ready, the watch CDB for result

This checks for RAW hazards

Instructions may take multiple clock

cycles here

Speculative Tomasulo’s Algorithm

If the value to be stored is available, then it

is written to the value field of the ROB entry

for the store.

If the value to be stored is not available yet,

then the CDB must be monitored until that

value is broadcast,

at which time the value field of the ROB

entry of the store is updated.

Write result con’t…

4. Commit

Commit can occur when an instruction reaches the head of the ROB and its result is present in the buffer.

Commit update register or store to memory with ROB result and free up ROB slot

If ROB head is an incorrectly predicted branch, then flush ROB

If the branch was correctly predicted, then the branch is finished

Speculative Tomasulo’s Algorithm

Example 1: Code

L.D F6,34(R2)

L.D F2,45(R3)

MUL.D F0,F2,F

SUB.D F8,F6,F

DIV.D F10,F0,F

ADD.D F6,F8,F

Speculative Tomasulo’s Algorithm

Table…

Also note that at the time

• MUL.D is ready to execute and only two L.D instructions have committed, although several other have completed execution.
• The SUB.D and ADD.D will not commit until the MUL.D instruction commits, although the results of the instructions are available and can be used as source for other instructions

Further, here

The DIV.D is in execution, but has not completed

solely due to its longer latency than MUL.D.

Explanation con’t…

The value column indicates the value

being held.

The format #X is used to refer to a value

field of ROB entry X.

Reorder buffers 1 and 2 are actually

completed but are shown for

informational purposes

Explanation con’t…

The table below shows the same

example for Tomasulo's approach

without speculation, discussed earlier.

Let us discuss the key important

difference between a processor with

speculation and a processor with

dynamic scheduling.

Explanation con’t…

Comparing the two tables we can see that

In the non-speculation case, the ADD.D and SUB.D

instructions completed out-of-order, i.e., before

the MUL.D completed

The in case of speculative hardware:

• The reservation stations numbers are replaced with the ROB entry numbers in Qj, Qk and in register status fields
• And, the DEST. Destination Field is added to reservation station
• The destination field designates the ROB number that is destination for result

Explanation con’t…

To show how speculation can improve performance in a

multiple issue processor. Let us consider an example.

Example

Consider the execution of the following loop, which

searches an array, on two- issue processor, once without speculation and once with speculation.

Loop: LD R2,0(R1) ; R2= array element DADDUI R2,R2,#1 ; increment R SD R2,0(R1) ; store result DADDUI R1,R1,#4 ; increment pointer BNE R2,R3,LOOP ; branch if not last element

Multiple issue with speculation

Assume that

• There are separate integer functional

units for the effective address

calculations, for ALU operations, and

for branch condition evaluation.

• up to two instructions of any type can

commit per clock

Multiple issue with speculation