CPSC 2105 Introduction to Computer Organization
Quiz 8 Wednesday, April 5, 2006
All questions in this test are based on the computer described below.
A computer has a 1MB (220 bytes) memory and a direct mapped cache. The memory is byte
addressable and organized into main memory blocks of 256 bytes (28 bytes).
The cache contains 16 blocks (24 blocks).
1. How many address bits are required to address the memory?
ANSWER: The memory has 220 bytes and is byte addressable, so there are 220 addressable
items. This requires a 20–bit address.
2. What is the size (in bytes) of the cache block?
ANSWER: The cache block has the same size as the main memory block.
The cache block size is 256 bytes.
3. What is the format of the memory address as seen by the cache, that is, what are the sizes
of the tag, block, and word fields?
ANSWER: With a 256 byte size, each cache block contains 256 (28) addressable items.
Thus 8 bits are required to specify the byte offset within the cache.
Also, 4 bits are required to specify the cache block, as there are 16 = 24 cache blocks.
Thus, the tag field has 8 bits, which is 20 – (8 + 4).
Bit 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field Tag Field Block # Byte offset in cache
Hex Digit 4 3 2 1 0
Note that the 20–bit address can be represented with five hexadecimal digits and that each
field in the address can be represented as one or two hexadecimal digits.
4. Suppose a word at address 0x23A45.
a) To which cache block will this memory reference map?
b) What is the offset (word address) in the cache block?
NOTE: You might want to give the answers in hexadecimal.
ANSWER: We apply the template above to determine the field values.
Bit 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Field Tag Field Block # Byte offset in cache
Hex Digit 2 3 A 4 5
The byte offset is 0x045 or decimal 69 (416 + 5).
The block number is 0x0A or decimal 10.
The tag field is 0x023 or decimal 35 (216 + 3).