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EE 231 Homework Assignment 6: Digital Logic Design - Prof. William Rison, Assignments of Digital Electronics

A homework assignment for a digital logic design course, ee 231. The assignment includes various problems involving decoders, multiplexers, and alus. Students are required to create block diagrams, dataflow descriptions, and verilog code to implement the given logic functions.

Typology: Assignments

Pre 2010

Uploaded on 08/08/2009

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EE 231
Homework Assignment 6
Due Oct. 8, 2008
Problem 4.161.
Problem 4.28. Use a block dia gram for the decoder, similar to
Figure 4.21 of the text.
2.
Problem 4.32. Use a block dia gram for the multiplexer, similar
to Figure 4.28 of the text.
3.
Problem 4.33. Use block diagra ms for the multiplexers.4.
Problem 4.345.
Problem 4.38. Use a da taflow description to implement the truth
table of Figure 4.26. Do not write a gate level description.
6.
Problem 4.437.
Problem 4.448.
Problem 4.469.
Problem 4.5810.
Bill Rison, <rison@ee.nmt.edu >
EE 231 Homework Assignment #6 http://www.ee.nmt.edu/~rison/ee231/hw/hw06.html
1 of 1 10 /09/200 8 1 0:58 AM
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EE 231

Homework Assignment 6

Due Oct. 8, 2008

1. Problem 4.

Problem 4.28. Use a block diagram for the decoder, similar to

Figure 4.21 of the text.

Problem 4.32. Use a block diagram for the multiplexer, similar

to Figure 4.28 of the text.

4. Problem 4.33. Use block diagrams for the multiplexers.

5. Problem 4.

Problem 4.38. Use a dataflow description to implement the truth

table of Figure 4.26. Do not write a gate level description.

7. Problem 4.

8. Problem 4.

9. Problem 4.

10. Problem 4.

Bill Rison, <rison@ee.nmt.edu >

EE 231 Homework Assignment #6 http://www.ee.nmt.edu/~rison/ee231/hw/hw06.html

1 of 1 10/09/2008 10:58 AM