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ENEE244 (sec 201-206) Spring 2006
Final Examination Pages: 9 printed sides
Name: ______ Answer key __________________________ Time alloted: 2 hours Student ID: ______________________________________ Maximum score: 100 points
University rules dictate strict penalties for any form of academic dishonesty. Looking sideways will be penalized. Look at only your own exam at all times.
There are 14 questions, some with subparts. Read them carefully to avoid throwing away points!! Write your answer in the space provided. Closed book, closed notes, no calculators.
Partial credit rule: Must show your intermediate steps clearly for partial credit!
1. Convert (23.875) 10 into a binary number. (6 points)
(23) 10 is converted to binary by repeated division:
23 | 11 | 1 5 | 1 2 | 1 1 | 0 0 | 1 23 = (10111) 2
Further, (0.875) 10 is converted to binary by repeated division:
0.875 * 2 = 0.75 + 1 0.75 * 2 = 0.5 + 1
0.5 * 2 = 0.0 + 1 //Remaining fraction is 0.0 ⇒ stop.
Thus (23.875) 10 = (10111.111) 2
2. Convert (735) 8 to a hexadecimal number. Do not convert to base 10 as an intermediate step. (4 points) (735) 8 = 111 011 101 To convert to hex, we regroup into groups of 4 bits each from the right to left. = 1 1101 1101 = (1DD) (^16) This can also be written as 0x1DD.
[Nick: please give only partial credit if student converts to base 10 in an intermediate step.]
3. A computer stores signed integers in 6-bit two’s complement form. If X = 18 and Y = -23, then show how this computer performs X + Y. (Show your steps and the answer as stored in computer). Is there an overflow? (8 points) +18 = 010010 +23 = 010111 In two’s complement negative numbers are stored as the two’s complement of their magnitude. 1s complement of 23 = 101000
2s complement of 23 = 101001 = -23.
X + Y = 010010
0 111011
Answer is (111011) 2 No overflow as carry into sign bit = carry out of sign bit. (Both are 0).
4. What is one advantage of the 2421 BCD code over the 8421 BCD code? (1-2 sentences). (3 points) The 2421 BCD code is self-complementing with respect to 9s complements (i.e, the 9s complement can be obtained by subtracting each BCD digit from 9). The 8421 code does not have this property.
Carry out of sign bit (discarded)
7. Is the NOR operator associative? Show why or why not. (6 points) For NOR to be associative we need (A NOR B) NOR C = A NOR (B NOR C). LHS = ((a + b)’ + c)’ = (a’b’ + c)’ // Demorgans. = (a’b’)’ c’ // Demorgans. = (a + b) c’ // Demorgans.
RHS = (a + (b + c)’)’ // Demorgans. = (a + b’c’)’ // Demorgans. = a’ (b + c) // Demorgans.
The simplified LHS and RHS are not the same. Hence NOR is not associative.
8. Does some function F=x(y+z') imply function G=xy + yz' + xz? Show why or why not without drawing the K-map. (6 points) A function F implies G if for inputs where F=1, then G=1 for those inputs. Expressing in standard form, F = xy + xz’. We notice that F has a term (xz’) that is not in G, so it looks like F does not imply G at first glance. To prove this, it is enough to find a counter-example where F=1 and G=0. This happens for x=1, y=0, z=0. For these inputs the term xz’ in F makes F=1, but G=0. Thus F does not imply G.
9. A Boolean function takes a BCD digit abcd as input, and outputs a single bit f which is 1 when the digit is one of 3,4,5,7,8, or 9; otherwise f is 0. Unused 4-bit combinations in BCD digits are don’t care inputs. (8 + 4 = 12 points) (a) Minimize f using a K-map into a sum-of-products minimum expression.
In canonical form, F = Σ m(3,4,5,7,8,9) + dc(10,11,12,13,14,15).
F = a + bc’ + cd
(b) Minimize f using a K-map into a product-of-sums minimum expression.
We draw the same K-map again, but this time, we combine the 0s to get F’.
F’ = a’b’c’ + cd’ Complementing both sides: (F’)’ = (a’b’c’ + cd’)’ ⇒ F = (a’b’c’)’ (cd’)’ = (a + b + c)(c’ + d)
ab
00 0 0 1 0
01 1 1 1 0
11 X X X X
10 1 1 X X
00 01 11 10
cd
ab
00 0 0 1 0
01 1 1 1 0
11 X X X X
10 1 1 X X
00 01 11 10
cd
11. In a commercial device we are designing, we want to simultaneously compute two functions F and G of the same three 1-bit inputs x,y, and z. F=1 whenever the number xyz is greater than 2, and 0 otherwise. G=1 when any two of x,y and z are equal but different from the third. (4 + 6 =10 points) (a) Draw the truth tables for F and G.
X y z F G 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 1 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 1 1 1 1 0
(b) We have a choice of encoders, decoders, multiplexors and demultiplexors to implement F and G. However our cost budget allows the use of only ONE INSTANCE OF ONE TYPE of any of these components for each device, along with at most two multi-input gates if necessary. Which one component will we choose? Draw a circuit to simultaneously compute F and G using that one component instance.
Both decoders and multiplexors can be used to compute any arbitrary Boolean function. A single decoder can be used to compute any number of Boolean functions, provided one extra OR gates is available to combine all the 1 terms in the minterm canonical form of the function. On the other hand, a multiplexor can be used to compute only a single Boolean function at one time. For this reason a decoder is a better choice here since both F and G need to be computed.
The circuit here connects xyz to the data inputs of the decoder. F is the output of an OR gate whose inputs are the outputs 3,4,5,6,7 of the decoder. G is the output of an OR gate whose inputs are the outputs 1,2,3,4,5,6 of the same decoder. (Students should draw circuit in their answers).
12. A T flip-flop is loaded with an initial value of 0. Thereafter in N successive cycles the N bits of a number X=xn ... x1 are provided on the T-input of the flip-flop, from least significant to most significant. What function of X does the flip-flop contain after N cycles? Do not use a formal analysis procedure; instead use your intuition. Your answer can be stated in English instead of a formal Boolean expression. (5 points) The T flip-flop toggles every time it sees a 1, and retains its state otherwise. From this we see that the number of times it toggles equals the number of 1s in X. With an even number of toggles, the output is 0. With an odd number of toggles, the output is 1. Thus the output is exactly the even parity function applied on X.
13. Consider a Moore machine circuit that takes two bits x and y as input and has a single bit output z. It outputs z=1 if there has been any successive 5 bits appearing in x and y simultaneously that are equal, at any time in the past. An example desired input/output sequence is:
x = 00101001010010101110 y = 01101111010001101111 z = 00000000000011111111 (6 + 4 = 10 points) (a) Draw a state diagram for this circuit. State what initial value, if any, should be loaded into the flip-flops for correct operation.
The flip-flops should be loaded with the binary encoding for state A for proper operation.
(b) Suppose the circuit above is designed by someone else. (Please do not design it yourself!). We wish to modify their design to remove the requirement for the circuit to be initialized. Show a simple way to modify the design that adds an extra start input S, such that when S=1, the circuit behaves as if it were in the start state. Otherwise, when S=0 the circuit behaves as normal. Assume that the start state is encoded as all zeros. ( Hint : Describe how each bit of the flip-flip inputs or outputs should be modified, without changing anything else in the circuit)
Each flip-flop output Q should be modified to S'Q before being passed to the combinational circuits computing the flip-flop inputs and the circuit output. The reason is that when S=1, then S'Q =0 and hence the circuit behaves as if the state was all 0's (start state). Alternatively when S=0, then S'Q=Q and hence the circuit behaves as before.
A/
xy=01 or 10
xy=00 or 11 xy=00 or 11 xy=00 or 11^ xy=00 or 11^ xy=00 or 11
xy=01 or 10 xy=01 or 10 (^) xy=01 or 10
xy=01 or 10
xy=00, 01,10 or 10
B/0 C/0 D/0 E/0 F/
