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Output is Valid - Computer Engineering - Solved Exam, Exams of Computer Science

Main points of this past exam are: OutputValid, Combinational Circuit, Mixed Logic Implementation, Control Input, Multiplexor Constructed, K-Map, Boolean Expression, Combinational Building Blocks, Multiplexors, Circuit Assembled

Typology: Exams

2012/2013

Uploaded on 04/08/2013

sawant_111
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ECE 2030 F
Exam II Solutions
October 1st, 2009
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ECE 2030 F

Exam II Solutions

October 1

st

  1. Design a combinational circuit that takes as input a 4-bit number for the digits 0- and outputs a value of 1 if the number is even or 0 otherwise. The circuit also has as output a valid signal V that denotes that the output is valid when it has a value of 1. If the input is a value between10-15 the output is don’t care and V is 0. Your design should be simplified using K-maps and provide the mixed logic implementation using 2-input NAND gates.
  1. Simplify the following expression to product of maxterms form using K-maps. In doing so i) draw the K-Map and clearly label all of the components, ii) list or otherwise identify clearly all prime implicants, and iii) and identify those which are essential.
  1. Implement the following Boolean expression using an appropriately sized multiplexor. FBCAB
  1. Consider the design of an 8 word ROM where each word has 4 bits and stores the numbers 0-7. Show the implementation clearly labeling all signals and the contents of each location.
  1. How many 4-1 multiplexors would be required to implement a 64-1 multiplexor? You must provide some justification for your answer.