Designing an Embedded System on FPGA using NIOS II: A Step-by-Step Guide, Essays (university) of Computer Aided Design (CAD)

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Embedded Systems

Embedded System design example René Beuchat Laboratoire d'Architecture des Processeurs rene.beuchat@epfl.ch

System to design, requests Softcore processor: NIOSII standard version  4kiB instruction cache  no data cache Memories: on-chip memory SRAM, 16 kiB with 32 bits width epcs controller for external Flash memory Programmable interfaces: JTAG UART for debug purpose Parallel port In 8 bits Parallel port Out 8 bits

FPGA Cyclone NIOS II JTAG debug SRAM internal 32 kiB EPCS ctrl Avalon Bus JTAG UART PIO 8 bits In PIO 8 bits Out General Bloc Schematic JTAG connection Through USB^ JTAG Switches LEDs Serial Flash Memory

How to design it?

• QuartusII  New project  CycloneII -> EP2C20F484C
• New schematic File Files  New  Bloc Diagram/Schematic Files  Save as… ( Labo_NIOS_InOut.bdf )
• SOPC Builder/Qsys(clic-clic or ) Select VHDL Give a name

SOPC Add Components

•  Peripherals  uC Peripheral  PIO  8 bits Input  8 bits Output
•  Interface Protocols  Serial  JTAG UART
• System  Auto Assign Base Addresses

SOPC View

Next steps: work on the board

• Correct the errors (if any)
• Nice! The design is ready
• Download on the board (FPGA4U/robot or other)
• Run NIOSII IDE and write the software Copy In port on Out Port by software