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TRANSISTOR AMPLIFIER CIRCUITS
4- Principles of Transistor operation as an Amplifier A load resistance RC connected to the collector as shown in Fig. 7, is used to amplify any small signal to be applied between base and emitter. Assume that
Fig. (7) Simplified schematic diagram of transistor amplifier circuit. VS is a sinusoidal wave of a relatively small amplitude compared to V (^) BB so that E-B junction is always forward biased. The effect of V (^) S is either to increase or decrease the forward biasing of E-B junction VBE ,
provided that E-B junction is always forward biased. If V S = V m sin (
t), then the emitter base voltage V (^) BE according to the circuit diagram shown in Fig. (7) is given by
VBE = VBB + V m sin ( t) (14)
According to Eq. (14), the maximum and minimum values of V (^) BE are (VBE ) (^) max. = VBB + V (^) m (15) and (VBE ) (^) min. = VBB - V (^) m (16) To keep E-B junction always forward biased, V (^) BE should be always
positive and around the cut-in voltage V (^) of this junction. The signal
voltage VS allows VBE to vary between (VBE) (^) min. and (V (^) BE) (^) max.. The emitter current I (^) E is given by a the relation of a p-n junction discussed in p-n junction chapter i.e., I (^) E =I (^) EO { exp(VBE / VT) - 1 } (17) where I (^) EO is the reverse saturation current of E-B junction. As studied earlier in diode chapter, any small change in V (^) BE will cause a large
change in I (^) E. The large change in I (^) E will cause large change in I (^) C (= I (^) E) according to Eq. (4-7). Thus a small change in V (^) S will cause large change in I (^) C. This change in I (^) C is converted into voltage because this current passes through the resistor R (^) C. Thus a small change in V (^) S is converted into large change in the voltage across R (^) C. As a result, this circuit amplifies the signal V (^) S , so it is called an amplifier. The amplification factor A (usually referred to by voltage gain A (^) V) can be written as A = ^ C^ ^ S
C C S
E e E
V
V
I R
V
I
r I
R
C =^ RC / re (18)
where r (^) e is the dynamic resistance of the E-B junction. Since is almost unity, then, Eq. (18) may be reduced to
A RC / re (19) Eq. (19) shows that the voltage gain of the amplifier is proportional to the load resistance R (^) C. The above analysis is oversimplified but it gives the physical explanation of how amplification phenomenon takes place. 5- I (^) C - VCE Characteristics Since the transistor has two junctions then, three alternative biasing techniques may take place namely, saturation, active and cut-off regions.
Saturation region In this region both E-B and C-B junctions are forward biased. Under these conditions the transistor is said to be operating in the saturation region. Fig.8(a) shows a generalized biasing of the transistor. The saturation region configuration is indicated in Fig.(8b) where both E-B and C-B junctions are forward biased. Since the forward biasing of any junction ranges about the
Active region In this region E-B junction is forward biased, while C-B junction is reverse biased as indicated in Fig.8(c). Under these conditions, the collector to emitter voltage may be large since the two voltage V (^) BE and VCB are added. Although V (^) EB is limited because it is forward biasing, the reverse voltage across collector base junction may be large. So the voltage VCE may be large in the active region as shown in Fig.(8e). The collector current is sufficiently large (but smaller than that of the saturation region). Thus, the active region is characterized by; Sufficiently large current, and
Relatively large VCE (compared to saturation region). Cut-off region In this region both E-B and C-B junctions are reverse biased as shown in Fig.(8d). It is obvious that both emitter and collector currents are very small (just minority carriers currents). The difference between the two reverse biased junctions may be large. Fig.(8e) shows the cut- off region on the characteristics curve. Thus cut-off region is characterized by; Very small collector current, and
Large collector to emitter voltage. 7- Biasing Technique The standard biasing circuit is indicated in Fig. (10). V (^) BB is generally smaller than V (^) CC. RB is inserted in the base to protect the EB junction and to minimize the base current to the allowed values. R (^) C is connected to limit both voltage across collector base (V (^) CB ) and collector current I (^) C. Considering Fig. (10) one can write
VBB = I B RB + VBE
or I (^) B = (VBB – VBE) / RB (20) I (^) C = β I (^) B (21) VCE = VCC – I (^) C RC (22)
Fig. 10 Since VBB is smaller than V (^) CC, then the circuit shown in Fig. 10 can be modified that shown in Fig. 11. R 1 and R 2 are used as a potential divider to obtain V (^) BB. Applying Thevenin's theorem between points B (base) and G (ground) yields
Fig. 11 VBB = VBG = VCC [ R 1 / (R 1 + R 2 ) ] (23) RB = RBG = R 1 // R 2 (24) These values simplifies the circuit shown in Fig. 11 to that indicated in Fig. 30 which is simpler in calculations.
8- BJT Circuit Stabilization
Fig. 12
- R 1 may be replaced by a negative temperature coefficient resistor (NTCR) leaving R 2 constant. Alternatively R 2 may bee replaced by a positive temperature coefficient resistor (PTCR) leaving R 1 constant.
- Two or more techniques may be employed together. 9- Load Line and Operating Point The Q point is the intersect of the load line and the I (^) C – VCE characteristics of the BJT as shown in Fig. 13. In general there are many Q points, each corresponding to a specified value of I (^) B. When R 1 , R 2 and RB of the circuit shown in Fig. 11 are selected, I (^) B is determined and so the Q is fixed. For amplifier circuits, I (^) B is selected to be in the active region mid way between saturation (large values of I (^) B ) and cut-off (very small values of I (^) B ).
Fig. 13 The operating point Q of the amplifier.
The load line can be drawn on the BJT characteristics using Eq. (22). This equation represents a straight line having two points of intersections with I (^) C and VCE axes. Graphical Analysis This section shows the amplification principle graphically using the illustration in Fig. 13. Assume that a small signal V (^) S (few mV) is applied to amplifier input. This results in a base voltage V (^) B , VB = VBB + v (^) S = VBB + VS sin ωt The total base current i (^) B is composed of the DC component I (^) BQ and the AC base current i (^) b , i (^) B = I (^) BQ + i (^) b With i (^) b the base current excursion over and below I (^) BQ as shown in Fig.
- This current causes the collector current to oscillate about the operating value I (^) CQ by i (^) C and causes V (^) CE to oscillate about V (^) CEQ by v (^) C. The voltage gain A (^) V is given by AV = (v (^) c) (^) pp / (v (^) S ) (^) pp With (v (^) c) (^) pp ≈ 10 V and (v (^) S ) (^) pp ≈ 100 mV, A (^) V ≈ 100. Fig. 33 shows that as v (^) S goes more positive, v (^) c goes more negative. This means that there is phase difference between v (^) S and v (^) c so the gain is negative if a single stage is used. 10- Small Signal BJT Model The small signal model can be deduced as follows;
- The emitter base junction acts as a diode with current i (^) b steeply increasing with V (^) BE as long as V (^) BB is equal to or greater than the
when BJT is operated in common emitter mode, r (^) O and r (^) i are termed r (^) ie and r (^) Oe as shown in Fig. 16.
Fig. 16 Equivalent circuit of Common Emitter Configuration (CEC).
In Common Base Configuration (CBC), we have r (^) ib and r (^) Ob while, for Common Collector Configuration (CCC) one has r (^) iC and r (^) OC as
Fig. 17 CBC and CCC equivalent circuits.
indicated in Fig. 17. Using these equivalent circuits, one can write r (^) ib = Vbe / i (^) e = Vbe / (i (^) C / α) = α r (^) ie r (^) Ob = VCb / i (^) C ≈ r (^) Oe r (^) iC = VbC / i (^) b ≈ V Ce / i (^) b = r (^) ie r (^) Oe = VCe / i (^) e = VCe / i (^) e = VCe / ( i (^) C / α) = α r (^) Oe 12- Analytical Analysis of a BJT Amplifier Let us now analyze the BJT amplifier shown in Fig. 21. Assume that VCC = 12 V, V (^) BE = 0.7 V, β = 100, R (^) C = 1.4 k, R 1 = 11 k, R 2 = 77 k, R (^) E = 100 Ω, R L = 3.5 k, r (^) S = 50 Ω, and r (^) Oe = 60 k. Determine the following; (a) Q – point I (^) CQ and VCEQ
(b) r (^) ie (c) Voltage gain A (^) V = VO / VS (d) Current gain Ai = i (^) O / i (^) S (e) Input impedance Zi (f) Output impedance ZO
Fig. 21 Solution To obtain the operating point, we consider the equivalent circuit shown in Fig. 22.
Fig. 22 (a) VBB = VCC [ R 1 / ( R 1 + R 2 ) ] = 12 [ 11 / (11 + 77)] = 1.5 V RB = R 1 // R 2 = 11 // 77 ≈ 10 k VBB = I (^) B RB + VBE + I (^) E RE VBB – VBE = I (^) B { RB + (1 + β) R E } I (^) B = ( VBB – VBE ) / { RB + (1 + β) R E } = (1.5 – 0.7) / { 10 + (1010.1)} ≈ 0.04 mA = 40 μA*
Vi = VS (RB // r (^) ie) / [ (RB // r (^) ie) + r (^) S ] Since RB is generally much larger than r (^) ie then Vi / VS ≈ r (^) ie / (rie + r (^) S ) (34) Combining Eqs. (32), (33), and (34) yields AV = - β [(r (^) Oe // RC // RL ) / r (^) ie] [r (^) ie / (r (^) ie + r (^) S )] ≈ - β (RC // RL ) / (r (^) ie + r (^) S ) = -100 (1.4 // 3.5) / (0.625 + 0.05) = - (d) Ai = i (^) O / i (^) S = ( VO / RL ) / {VS / [ r (^) S + (RB // r (^) ie)]} ≈ A V (r (^) S + r (^) ie) / RL = -159 (0.63 / 3.5) = -28. (e) Zi = VS / i (^) S = r (^) S + (RB // r (^) ie ) = ≈ r S + r (^) ie = 0.63 k (f) ZO = r (^) Oe // RC // RL = 60 // 1.4 // 3.5 ≈ 1 k
13- Common Collector Amplifier (Emitter Follower) The basic configuration of Common Collector (CC) circuit is indicated in Fig. (25a). The output is taken across the emitter resistor. The DC analysis of the CC circuit is obtained by considering the capacitors open circuited under DC operation, as shown in Fig. (25b).
Fig. 25 Common Collector (a) Basic configuration, (b) DC circuit.
Using the circuit shown in Fig. (25b), one can write
VCC = I B RB + VBE + I E RE
Since I (^) E = ( 1 + β ) I (^) B Then VCC – VBE = [ RB + ( 1 + β ) R E ] I (^) B Or I (^) B = (VCC – VBE) / [ RB + ( 1 + β ) R E ] (35) I (^) E = (1+ β) I (^) B = (1+ β) (VCC – VBE) / [ RB + ( 1 + β ) R E ] (36) VCE = VCC – I (^) E RE (37) Example-1: If R (^) B = 33 k, R (^) E = 100 Ω, β = 100, and V (^) CC = 5 V then using Eq. (1) one finds I (^) B = (5 – 0.7) / [ 33 + (1010.1)] = 0.1 mA Using Eq. (2) I (^) E = (1+ β) I (^) B = 101 0.1 = 10.1 mA I (^) C = I (^) E – I (^) B = 10.1 – 0.1 = 10 mA Using Eq. (3) V (^) CE = 5 – (10.10.1) ≈ 4 V r (^) ie = β V T / I (^) C = 10025 / 10 = 250 Ω The AC analysis is obtained by considering the circuit indicated in Fig.
- Note that all capacitors are considered short circuited in the AC model as shown in Fig. (26a). The AC equivalent circuit is indicated in Fig. (26b). Using Fig. (26b), one obtains
Fig. 26 Common collector (a) Basic circuit, (b) AC equivalent circuit.
AV = VO / VS = (VO / Vi ) (Vi / VS ) VO = i (^) e RE = (1+ β) i (^) b RE
Zi = RB // [ (1+ β) RE + r (^) ie ] (42) Considering the values given in example-1, one finds Zi = 33 // {(101*0.1) + 0.25 } = 7.9 k To obtain a relation for the output Impedance Z (^) O of the amplifier, consider the circuit shown in Fig. 28. The circuit shown in Fig. (28a) is obtained from the circuit shown in Fig. (26b). The output impedance is obtained as follows;
Fig. 28 Equivalent circuit to calculate the output impedance Z (^) O.
- The load RE is replaced by a voltage source V (^) O.
- The input signal Vi is replaced by a short circuit.
- The output impedance ZO' is simply V (^) O divided by the current passing through V (^) O (i.e. (1+ β) i (^) b ).
- The output impedance ZO = ZO' // RE Reference to Fig. 4(a), one can write ZO' = VO / (1+ β) i (^) b = i (^) b r (^) ie / (1+ β) i (^) b = r (^) ie / (1+ β) ( 43) ZO = ZO' // R (^) E = RE // [r (^) ie / (1+ β) ] (44) Considering the values given in example-1, one finds ZO ' = 250 / 101 ≈ 2.5 Ω and Z O = 100 // 2.5 ≈ 2.5 Ω. For the circuit shown in Fig. (4a), one observes the following:
- VO follows V (^) S in phase.
- The voltage is generally less than unity and it approaches unity if r (^) ie is much smaller than (1+ β) R E.
- The output impedance is very small. Thus small loads may be connected without loading CC circuit. This feature makes CC circuit very good buffer used between amplifier and loads particularly if these loads have low impedance.
- The input impedance of this stage is large and it may be further significantly increased if MOSFET transistor is used. Example-2 For the amplifier circuit shown in Fig. 29, an emitter follower (CC) stage is inserted between two common emitter (CE) stages. The values of the resistors and transistor parameters are RC1 = RC2 = RL = 2 k, β = 100 , r (^) ie = 1 k, r (^) ce = 60 k, R (^) B = 20 k, R (^) E = 200 Ω, R 1 = R 1 ' = 2.54 k , and R 2 = R 2 ' = 9.44 k. Determine (a) The voltage gain with and without emitter follower stage. (b) The current gain with and without emitter follower stage. (c) The input and output impedance with emitter follower.
Fig. 29 Example-2 circuit.
Solution (a) With the emitter follower the voltage gain of the first stage A (^) V1 is
