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This course focuses on quantitative principle of computer design, instruction set architectures, datapath and control, memory hierarchy design, main memory, cache, hard drives, multiprocessor architectures, storage and I/O systems, computer clusters. This lecture includes: Issue, Speculative, transformations, Branch, Code, Instruction, Slot, Load, Compiler, Penalty
Typology: Slides
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Here, the second LW after the branch LW R9, 0(R8), depends on the prior load LW R8, 0(R10)
First instruction slot Second instruction slot
LW R1,40(R2) ADD R3,R4,R
LWC R8,0(R10),R10 ADD R6,R3,R
BEQZ R10,L
LW R9,0(R8)
Predicated or conditional instructions are extremely useful:
To move an instruction across a branch and making it conditional will:
slow the program whenever the move instruction would not have been normally executed
Conditional instruction results in a stall for data hazard, if the condition evaluation and predicated instructions are not separated
Conditional instruction may have some speed penalty compared to unconditional instructions
The use of Conditional instruction is limited when the control flow involves more than a simple alternative sequence
For example, moving an instruction across multiple branches requires making it conditional on both the branches
Thus, it requires to specify additional instructions to compute the controlling predicate
Here, the compiler speculates to: either improve the scheduling and/or to increase the issue rate However, the predicated instructions may help to speculate These instructions are more useful when they can eliminate control dependence by if-conversion
Compiler speculation with hardware support
The ability to find instruction can be speculatively moved and not affect the program data flow
The ability to ignore exceptions in speculated instructions, until we know such exception would really occur
The ability to speculatively interchange loads and stores, or stores and stores, which may have address conflicts.
