Docsity
Docsity

Prepare for your exams
Prepare for your exams

Study with the several resources on Docsity


Earn points to download
Earn points to download

Earn points by helping other students or get them with a premium plan


Guidelines and tips
Guidelines and tips

Introduction to IC fabrication technology, Slides of Fundamentals of Semiconductor Fabrication

ic fab - ic fab

Typology: Slides

2013/2014

Uploaded on 11/17/2014

VLSI.EC
VLSI.EC 🇮🇳

1 document

1 / 50

Toggle sidebar

This page cannot be seen from the preview

Don't miss anything!

bg1
Introduction to IC fabrication
technology
pf3
pf4
pf5
pf8
pf9
pfa
pfd
pfe
pff
pf12
pf13
pf14
pf15
pf16
pf17
pf18
pf19
pf1a
pf1b
pf1c
pf1d
pf1e
pf1f
pf20
pf21
pf22
pf23
pf24
pf25
pf26
pf27
pf28
pf29
pf2a
pf2b
pf2c
pf2d
pf2e
pf2f
pf30
pf31
pf32

Partial preview of the text

Download Introduction to IC fabrication technology and more Slides Fundamentals of Semiconductor Fabrication in PDF only on Docsity!

Introduction to IC fabrication

technology

  • (^) The growth of electronics started with invention of vaccum tubes and associated electronic circuits.
  • (^) This activity termed as vaccum tube electronics , subsequently the evolution of solid state devices and consequent development of integrated circuits are responsible for the present status of communication, computing and instrumentation. - (^) The first vaccum tube diode was invented by john ambrase fleming in 1904. - (^) The vaccum triode was invented by lee de forest in 1906.
  • (^) In 1947 the first point contact transistor was invented by john barden and walter H. Brattain at bell laboratories.
  • (^) Vaccum tubes ruled even being expensive, power hungry, unreliable.
  • (^) Then, Invention of transistor is the driving factor of growth of the VLSI technology.
  • (^) Small scale integration(SSI) The technology was developed by integrating the number of transistors of 1- 100 on a single chip. Ex: Gates,flip-flops,op-amps.
  • (^) Medium scale integration(MSI) The technology was developed by integrating the number of transistors of 100-1000 on a single chip. Ex:Counters,MUX, adders, 4- bit microprocessors.
  • (^) Large scale integration(LSI) The technology was developed by integrating the number of transistors of 1000-10000 on a single chip. Ex:8-bit mps, ROM, RAM.
  • (^) Very large scale integration(VLSI) The technology was developed by integrating the number of transistors of 10000- 1Million on a single chip. Ex:16-32 bit mps, peripherals, complimentary high MOS.
  • (^) Ultra large scale integration(ULSI) The technology was developed by integrating the number of transistors of 1Million- Millions on a single chip. Ex: special purpose processors.
  • (^) Giant scale integration(GSI) The technology was developed by integrating the number of transistors of above 10 Millions on a single chip. Ex:Embedded system, system on chip.

Moore’s Law

Number of transistors of a chip doubles every 1.5 to 2 years.

  • (^) In 1965, Gordon Moore, an industry pioneer, predicted that the number of transistors on a chip doubled every 18 to 24 months.
  • (^) He also predict that semiconductor technology will double its effectiveness every 18 months
  • (^) Many other factors also grow exponentially those are:
    • clock frequency
    • processor performance
  • (^) The surface is now covered with a photoresist which is deposited onto the wafer and spun to achieve an even distribution of the required thickness.
  • (^) The photoresist layer is then exposed to ultraviolet light through a mask which defines those regions into which diffusion is to take place together with transistor channels.
  • (^) These areas are the subsequently readily etched away together with the underlying silicon dioxide so that the wafer surface is exposed in window defined by the mask.
  • (^) The polysilicon layer consists of heavily doped polysilicon deposited by chemical vapour deposition(CVD), Further photoresist coating and masking allows the polysilicon to be patterned and then the thin oxide is removed to exposed areas into which n-type impurities are to be diffused to form the source and drain.
  • (^) Diffusion is achieved by heating the wafer to a high temperature and passing a gas containing the desired n-type impurity over the surface.
  • (^) Thick oxide (sio2) is grown over all again and is then masked with photoresist and etched to expose selected aareas of the polysilicon gate and the drain and source areas where connections area to be made.