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For a detailed description of field usage and instruction type for each instruction, see the. MIPS Green Card. 6/27/2012.
Typology: Study notes
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6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ New^ registers:
-^ Also:^ $at,^ $k0-k
,^ $gp,^ $fp,^ PC
-^ New^ instructions:
-^ Saved^ registers:
-^ CalleR saves^ volatile
registers^ it^ is^ using
before making^ a^ procedure
call
-^ CalleE saves^ saved
registers^ it^ intends
to^ use 6/27/^
Summer^2012 ‐‐^ Lecture^ #^
Great^ Idea^ #1:
Levels^ of Representation/Interpretation6/27/2012 Summer
2012 ‐‐^ Lecture^ #^ lw^ $t0,^ 0($2)lw^ $t1,^ 4($2)sw^ $t1,^ 0($2)sw^ $t0,^ 4($2) Higher‐Level^ LanguageProgram^ (e.g.^ C)^ Compiler Assembly^ Language^ Program^ (e.g.^ MIPS) Assembler Machine^ Language^ Program^ (MIPS) Machine Interpretation Hardware^ Architecture^ Description(e.g.^ block^ diagrams)
temp^ =^ v[k];v[k]^ =^ v[k+1];v[k+1]^ =^ temp; 0000 1001 1100 0110 1010 1111 0101
1000 1010 1111 0101 1000 0000 1001 1100
0110 1100 0110 1010 1111 0101 1000 0000
1001 0101 1000 0000 1001 1100 0110 1010
1111 Architecture Implementation^ Logic^ Circuit^ Description(Circuit^ Schematic^ Diagrams)
We__are__here._
-^ Stored‐Program
-^ R‐Format •^ Administrivia •^ I‐Format^ –^ Branching^ and
PC‐Relative^ Addressing
-^ J‐Format •^ Bonus:^ Assembly
-^ Bonus:^ Disassembly
6/27/^
Summer^2012 ‐‐^ Lecture^ #^
binary^ form
-^ Programs^ bound^ to
specific^ instruction^ set
-^ i.e.^ different^ versions
for^ (old)^ Macs vs.^ PCs
-^ New^ machines^
want^ to^ run^ old^ programs
(“binaries”) as^ well^ as^ programs
compiled^ to^ new
instructions
-^ Leads^ to^ “backward
compatible”^ instruction
sets^ that evolve^ over^ time^ –^ The^ selection^ of^ Intel
80x86^ in^1981 for^ 1st
IBM^ PC^ is^ major reason^ latest^ PCs^ still
use^ 80x86^ instruction
set^ (Pentium 4);^ you^ could^ still^ run
program^ from^1981 PC^ today 6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ Currently^ all^ data
a^ word^ in^ length – lw and sw both^ access^ one^ word
of^ memory
-^ So^ how^ do^ we
1s^ and 0s,^ so^ “add $t0,$0,$
”^ is^ meaningless.
-^ MIPS^ wants^ simplicity:
since^ data^ is^ in^ words,
let instructions^ be^ in
words,^ too 6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ I‐Format: instructions
-^ But^ not^ the^ shift
instructions
-^ J‐Format:^ j^ and
-^ But^ not^ jr • R‐Format: all^ other
-^ It^ will^ soon^ become
6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ Stored‐Program
-^ R‐Format •^ Administrivia •^ I‐Format^ –^ Branching^ and
PC‐Relative^ Addressing
-^ J‐Format •^ Bonus:^ Assembly
-^ Bonus:^ Disassembly
6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ opcode^ (6):^
-^ Set^ at^ 0b000000 for
-^ funct^ (6):^ combined
-^ How^ many^ R‐format
-^ opcode^ is^ fixed,
so^64
-^ Why^ aren’t^ these
-^ We’ll^ answer^ this
later 6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ rs^ (5):^ specifies
-^ Recall:^ MIPS^ has
-^ Fit^ perfectly^ in^ a^
5 ‐bit^ field^ (use^ register
numbers)
-^ These^ map^ intuitively
-^ e.g.^ add^ dst,src1,src
^ add^ rd,rs,rt
-^ Depending^ on^ instruction,
field^ may^ not^ be^ used 6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ MIPS^ Instruction:^ add^ $8,$9,$10 •^ Pseudo‐code^ (“OPERATION”
add^ R[rd]^ =
R[rs]^ +^ R[rt]
-^ Fields:^ opcode^ =^0
(look^ up on
Green^ Sheet) funct^ =^32
(look^ up on^ Green^
Sheet) rd^ =^8
(destination) rs^ =^9
(first^ operand ) rt^ =^10
(second^ operand ) shamt^ =^0
(not^ a^ shift) 6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ MIPS^ Instruction:
Field^ representation
(binary): hex^ representation:^
0x 012A 4020 decimal^ representation:
19,546, Called^ a^ Machine^ Language
Instruction
two
6/27/^
Summer^2012 ‐‐^ Lecture^ #^
17 0
31
0
000000
0
-^ Stored‐Program
-^ R‐Format •^ Administrivia •^ I‐Format^ –^ Branching^ and
PC‐Relative^ Addressing
-^ J‐Format •^ Bonus:^ Converting
6/27/^
Summer^2012 ‐‐^ Lecture^ #^
-^ HW^2 due^ Sunday •^ Project^1 due
days 6/27/^
Summer^2012 ‐‐^ Lecture^ #^