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Floor Planning, Interconnect, Standard Cell Frames, Conductors and Contacts | EE 432, Study notes of Electrical and Electronics Engineering

Material Type: Notes; Class: INTRODUCTION TO VLSI DESIGN; Subject: Electrical Engineering; University: Idaho State University; Term: Unknown 1989;

Typology: Study notes

Pre 2010

Uploaded on 09/02/2009

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Introduction to VLSI
Floor Planning, Interconnect, Standard Cell
Frames, Conductors and Contacts.
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Introduction to VLSI

Floor Planning, Interconnect, Standard Cell

Frames, Conductors and Contacts.

Datapath Planning

Control

Signals

(Metal 2)

A single bit cell

Power and Datapath

(Metal 1)

Standard Cell Frame

● Fixed Height, Adjustable Width

Adjustable

Fixed

Power Buses

● Fixed Power and Ground Buses

Adjustable

Fixed

vdd!

gnd!

Substrate and Well Taps

● Latchup Prevention

Adjustable

Fixed

vdd!

gnd!

Just Add Transistors

Adjustable

Fixed

vdd!

gnd!

P Transistors Here

N Transistors Here

Connection By Abutment

Arraying Std Cells

Vdd Gnd Vdd Gnd

Diffusion Sharing

Vdd Gnd

X

In

In

(^1) Out

X

No Twisted Poly

P and N transistors that share a gate connection are across from each other. Good Bad

Conducting Layers

● Diffusion

– N-type

– P-type

● Polysilicon

– small broken-up crystalline regions of silicon

● Metals

– aluminum

Squares

● Both are 3 squares...

● Both have the same resistance

● But what about capacitance?

A square is a shape whose length is the same as its width.

Maximum Current Density

● Metal migration failures result from carrying too

much current (metal erosion)

● JAl is maximum current density of aluminum = 1

to 2 mA/um of width

● Problem for power buses.

● Too much current causes electromigration of

aluminum

Contact Arrays

Instead of

this...

Do this...

Bad Good

Instead of

this...

Do this...

Bad Good