COSC 321 FALL 08
Think about these for the final:
1. The datapath shown on page 307 has three ALUs. How many physical ALUs are
actually required?
2. Consider the datapath shown on page 307. Identify which stage each of the
components belong to in the pipeline described in section 6.1:
PC
ALU (with ‘4’ as one of its inputs)
Instruction memory
ALU (with an input labeled “shift left 2”)
ALU (with an output labeled “Zero”)
Data memory.
3. Consider the datapath shown on page 307. For a lw instruction, which control lines
(blue) are asserted?
4. Consider the datapath shown on page 307. Which control lines are necessary for proper
operation of the EX stage of the pipeline in section 6.1?
5. Consider Figure B.9.3 of Appendix B. Write data word 11 to location 00. What are the
values of all the input lines?
6. Consider Figure B.9.1. Draw a similar picture for a 16K X 8 SRAM (Note, I still
don’t know where the 2M X 16 in the figure comes from. It looks like a 32K X 16 SRAM
to me)
7. Consider Figure B.9.1. Put together several 32K X 16 SRAMs to build a 64K X 32
memory.