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COMPE 271
FINAL Exam
Open Books - No Notes or ot87uher third party materials – No Calculators
1- (15 Points)
Given the following assembly function and corresponding C function skeleton code. Fill in the blanks in the given C function block to match the assembly function behavior.
globl _someOperation _someOperation:
pushl %ebp movl %esp , %ebp xorl %eax , %eax movl 8( %ebp ), %ebx
movl 12( %ebp ), %edx
movl (%edx),%ecx
cmpl %ebx , %ecx
jge done movl %ecx , %eax
done:
popl %ebp ret
Int someOperation(int a , int *b) {
int k;
k =.......... ;
if (.......... )
k =...... .;
Return (k) }
2- (15 points) Given the following assembly code corresponding C function skeleton code. Complete the C function to perform the same operation as the assembly function.
.globl _someOperation _someOperation: pushl %ebp movl %esp , %ebp movl 8( %ebp ), %ebx movl 12( %ebp ), %edx decl %edx xorl %esi , %esi movl ( %ebx , %esi ,4), %eax
continue:
incl %esi cmpl ( %ebx , %esi ,4), %eax jl thelabel movl ( %ebx , %esi ,4), %eax thelabel: cmp %esi , %edx jne continue movl %ebp , %esp popl %ebp ret
a-
Void someOperation(int *Num, int count) {
int k ;
k=............... .;
return(k);
4- (10 points) (Binary Number System)
a- Consider a 16 bit binary number system. Write the binary equivalent of the largest positive
number.
b- Consider a 16 bit binary number system. Write the Hexadecimal equivalent of the smallest
negative number.
c- Consider a 16 bit binary number system. Write the number -90 in binary.
d- Compute two's complement of the number 0x50FF and write the result in Hexadecimal.
e- Consider a 16 bit binary number system. Write -123 in hexadecimal.
5- (10 points) (Floating Point Number System)
a- Consider a 16 bit floating point number system. The sign bit is the most significant bit. 5 bits are
reserved for the exponent and remaining 10 bits are the mantissa. A bias of 15 is to be used. What is the floating point representation of number 2.
b- Consider a 16 bit floating point number system. The sign bit is the most significant bit. 5 bits are
reserved for the exponent and remaining 10 bits are the mantissa. What is the largest denormalized number. write the number in floating point format.
c- Consider a 16 bit floating point number system. The sign bit is the most significant bit. 5 bits
are reserved for the exponent and remaining 10 bits are the mantissa. A bias of 15 is to be used. Express -5.75 in binary using the floating point number system given above.
d- Consider a 16 bit floating point number system. The sign bit is the most significant bit. 5 bits
are reserved for the exponent and remaining 10 bits are the mantissa. A bias of 15 is to be used. Write the floating point equivalent of 121 in binary using the floating point representation above.
e- Consider a 16 bit floating point number system. The sign bit is the most significant bit. 5 bits
are reserved for the exponent and remaining 10 bits are the mantissa. A bias of 15 is to be used. Represent +Infinity in binary using the floating point representation above.
Question 7 - (Knowledge assessed – Memory , Performance ) (10 points )
A computer has a cache, main memory and disk used for virtual memory. If a reference word is
in the cache 4 ns are required to access it. If it is in the main memory but not in the cache , 50
ns are required to load it into the cache and then reference is started again. If the word is not in
the main memory , 10 ms are required to fetch from disk , followed by 50 ns to copy it into the
cache and then the reference is started again. The cache hit ratio is 0.9 and the main memory his
ratio is 0.6. What is the average time in nanoseconds required to access a referenced word on this
system?
Question 8 - (Processor Architecture – 20 points)
Using the figure below , propose a multiplexer control logic for the multiplexer input connected to valA
at the Decode stage. Based on the data feedback from later stages, the output of the register file and
valP, the logic you design should choose the correct input value for the valA in the execute stage. The
multiplexer has 8 inputs this 3 bit selection logic will satisfy the need. Describe the design of the logic
circuit that will supply the three bit selection logic for choosing the correct input for valA.
FF
D D
Instruction
Instruction^ memory^ memory
ALU
Data
memory
dstE
ALU
A
ALU
B
srcA
srcB
read
write
ALU^ fun.
data out
data in A
B
M
E
M_valA
Cnd
valE icode
valA
dstE
dstM
E
icode
ifun
valC
valA
valB
dstE dstM
srcA
srcB
stat
valC
valP
ifun
rA
d_srcB
decimal offsets (positive or negative) relative to register %ebp:
