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FET High Frequency Response models and circuits
Typology: Study notes
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ø ö ç ç è æ
and (^) m o GD gdo gd V
ø ö ç ç è æ
y
, where Cgso , Cgdo are the zero-bias gate-source and gate-drain junction capacitances, respectively, in Farads; VGS , VDS are the quiescent gate-source and drain-source voltages, respectively; m is the gate p-n grading coefficient (SPICE default = 0.5); y o is the gate junction (barrier) potential, typically 0.6 V (SPICE default = 1V).
t ox^ ox C^ WL ox = = (^) ox ¢ Î , where Cox is the oxide capacitance formed by the gate and channel Cox ¢ is the oxide capacitance per unit area Î ox is the permittivity of the oxide layer (silicon oxide - SiO 2 : 3.9 Î o ) tox is the thickness of the oxide layer (separation between the gate and channel) W , L are the width and the length of the channel under the gate, respectively.
ø ö ç ç è æ ¢ (^) = 2
PO DSS ox V
μ , for depletion MOSFETs (10.7-4a) Cox ( 2 K )
¢ (^) = , for enhancement MOSFETs, (10.7-4b) where μ is the charge mobility (typically 600 cm^2 /V-s for n-channel, 200 cm^2 /V-s for p-channel.
and C (^) gd = C (^) gdoW , (10.7-6) where Cgso , Cgdo are the zero bias gate-source and gate drain capacitances, respectively (typically Cgso = Cgdo = 3 ´ 10 -^12 F/m), and are related to Cox ¢.
v (^) gs Figure 10.7-1. Accurate FET High-frequency Model
v (^) gs Figure 10.7-2. Simplified FET High-frequency Model
m T C C g