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Computer Architecture: Instruction Set Principles - Registers, Addressing Modes, Encoding, Slides of Advanced Computer Architecture

Gujarat UniversityAdvanced Computer Architecture

An in-depth exploration of instruction set principles, including the three pillars of computer architecture: hardware, software, and instruction set. It covers topics such as stack, accumulator, and general purpose registers, operand addressing modes, instruction encoding, and multimedia and digital signal processing. The document also includes practice problems to test understanding.

Typology: Slides

2011/2012

Uploaded on 08/06/2012

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Three areas of data allocation … Cont’d:
3: Dynamic Object Allocation: Heap
- It is used to allocate the objects that
do not adhere to stack
- The objects in heap are accessed
with pointer but are not scalars
- Most heap variable are aliased so
register allocation is almost
impossible for heap
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Download Computer Architecture: Instruction Set Principles - Registers, Addressing Modes, Encoding and more Slides Advanced Computer Architecture in PDF only on Docsity!

Three areas of data allocation … Cont’d:

3: Dynamic Object Allocation: Heap

  • It is used to allocate the objects that

do not adhere to stack

  • The objects in heap are accessed

with pointer but are not scalars

  • Most heap variable are aliased so

register allocation is almost

impossible for heap

ISA Performance … Cont’d

 MIPS Floating-point Operations

  • The instructions manipulate the floating-

point registers

  • They indicate whether the operation is to

be performed on single precision or

double precision

MOV.S copies a single precision register to another of the same type

MOV.D copies a Double precision register to another of the same type

Putting it All Together

  • The earliest architectures were limited to

instruction sets by the hardware

technology of that time

  • In the 1960s, stack architecture became

popular, viewed as being good match of

high-level language

  • In the 1970s, the main concern of the

architectures was to reduce the software

cost, thus produced high-level

architectures such as VAX machine

Putting it All Together .. Cont’d

  • In the 1980s, return to simpler

architecture took place due to

sophisticated compiler technology

  • In the 1990s, new architectures were

introduced; these include:

Concluding the Instruction set Principles

Three pillars of Computer Architecture

Hardware, Software and Instruction Set

Instruction Set Interface between hardware and software

Taxonomy of Instruction Set: Stack, Accumulator and General Purpose Register

Types and Size of Operands: Types: Integer, FP and Character Size: Half word, word, double word

Classification of operations Arithmetic, data transfer, control and support

Concluding the Instruction set Principles … Cont’d

Operand Addressing Modes

Immediate, register, direct (absolute) and

Indirect

Classification of Indirect Addressing

Register, indexed, relative (i.e. with

displacement) and memory

Special Addressing Modes

Auto-increment, auto-decrement and scaled

Control Instruction Addressing modes

Branch, jump and procedure call/return

Concluding the Instruction set Principles … Cont’d

MIPS Instruction word format

  • RISC and MIPS a fixed length, 64-bit LOAD/STORE

Architecture

  • It supports:
    • 8-, 16-, 32- and 64-bit operand
    • R-type, I-type and J-type
    • Arithmetic and logic operation
    • data transfer operations
    • Control flow operations

Concluding the Instruction set Principles … Cont’d

 Multimedia and Digital Signal Processing Operands

  • Graphic applications deal with 2D and 3D images
  • DSP adds fixed point to the data types – binary point just to the right of the sign-bit

 Multimedia and Digital Signal Processing operations

  • All are fixed-width operation , performing multiple narrow operations on either 64-bit or 128-bit ALU
  • The narrow operation B-byte, H-half word, W-word and 8B double word

 Multimedia and Digital Signal Processing issues

  • Saturating Add/Subtract

Result Rounding

Multiply Accumulate

Allah Hafiz

and

Asalm-u-Alacum

Practice Problems

Quantitative Principles [Lecture 2-3]

Instruction Set Principles [Lecture 4-5]

Solution to Practice Problem 1

a) The instruction count of Sequence 1 = 2+4+1 = 7 Sequence 2 = 1+1+4= 6 Result: Sequence 2 executes fewer instructions

b) To find which sequence is faster, we have to find the CPU clock cycles for each sequence

CPU Clock Cycles for sequence 1 = 2x2 + 3x4 + 4x1 = 20 cycles CPU Clock Cycles for sequence 1 = 2x3 + 3x2 + 4x4 = 28 cycles

Result: Sequence 1 is faster

c) To find the CPI [ CPU Cycles/Instruction Count) of each sequence

CPI for sequence 1 = 20/7 = 2. CPI for sequence 2 = 28/6 = 4. Result: Sequence 2 which has fewer instructions has higher CPI, thus is slower

Practice Problems

Instruction Set Principles [Lecture 4-5]