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Designing a Single Board Computer with 8086/80C186XL and Custom Logic Functions, Study Guides, Projects, Research of Microprocessors

A microprocessors design project from spring 2004 where students are required to create a single board computer using an 8086/80c186xl system, 8-bit sram, eeprom, and intel 82c55a-2 pio unit. Students must also design and implement an arbitrary logic function. The project includes creating a design specification, schematics, simulation results, hand-calculated derivations, and a report.

Typology: Study Guides, Projects, Research

2009/2010

Uploaded on 03/28/2010

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CompE-475 Microprocessors
Spring 2004 Design Project
Objective
Design a single board computer for a more-or-less complete 8086/80C186XL-based
system containing at least 128k x 8 bytes of SRAM using 8-bit wide SRAM chips of your
own choice, at least 64k of EEPROM, and at least one Intel 82C55A-2 PIO unit
connected to the lower data bus through a tri-state transceiver designed in a
CPLD/FPGA.
In addition, your design must include an arbitrary logic function that provides
external signals that perform a useful external operation of your own specification. Some
possible choices are
8259 Priority Interrupt Controller
LED/LCD display driver circuit,
Counter,
Character generator,
Stepper Motor Controller
Big-Screen Neon Sign Display
Interface with Keyboard and Display
RS-233 programmable parallel I/O port
Polled DTMF Command Decoder
Interrupt Driven DTMF Decoder
Remote numeric pad decoder
Musical Keyboard sampler
Electronic Car Alarm
Multi-function Remote Control
and any other based on a student’s interest.
The key assignment problem is to provide a complete interface that includes all
circuitry necessary to cause your 8-bit SRAM to appear as a 16-bit fully double banked
SRAM to the 8086/8OC186XL. This will require that you to provide an 8-bit to 16-bit
trans-multiplexer function in your PLD device. Your logic design may or may not fit
inside the smaller MAX7032 type CPLD so you will probably need to consider a larger
and faster Altera CPLD/FPGA. A generally guideline is to use design parts that are
available in the Mentor Graphics SmartmodelTM Library.
Report Format
Submit a written report that will include the following:
1. (10 pts) Write a design specification for your design that describes
1. What your system will do (e.g. a single board computer with display driver and
keyboard circuit),
2. How and why you selected certain parts, including part speed grades, pad sizes,
pf3

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CompE-475 Microprocessors

Spring 2004 Design Project

Objective

Design a single board computer for a more-or-less complete 8086/80C186XL-based system containing at least 128k x 8 bytes of SRAM using 8-bit wide SRAM chips of your own choice, at least 64k of EEPROM, and at least one Intel 82C55A-2 PIO unit connected to the lower data bus through a tri-state transceiver designed in a CPLD/FPGA. In addition, your design must include an arbitrary logic function that provides external signals that perform a useful external operation of your own specification. Some possible choices are

  • 8259 Priority Interrupt Controller
  • LED/LCD display driver circuit,
  • Counter,
  • Character generator,
  • Stepper Motor Controller
  • Big-Screen Neon Sign Display
  • Interface with Keyboard and Display
  • RS-233 programmable parallel I/O port
  • Polled DTMF Command Decoder
  • Interrupt Driven DTMF Decoder
  • Remote numeric pad decoder
  • Musical Keyboard sampler
  • Electronic Car Alarm
  • Multi-function Remote Control and any other based on a student’s interest.

The key assignment problem is to provide a complete interface that includes all circuitry necessary to cause your 8-bit SRAM to appear as a 16-bit fully double banked SRAM to the 8086/8OC186XL. This will require that you to provide an 8-bit to 16-bit trans-multiplexer function in your PLD device. Your logic design may or may not fit inside the smaller MAX7032 type CPLD so you will probably need to consider a larger and faster Altera CPLD/FPGA. A generally guideline is to use design parts that are available in the Mentor Graphics SmartmodelTM^ Library.

Report Format

Submit a written report that will include the following:

  1. (10 pts) Write a design specification for your design that describes
    1. What your system will do (e.g. a single board computer with display driver and keyboard circuit),
    2. How and why you selected certain parts, including part speed grades, pad sizes,

estimated costs, and any other pertinent information your team used, and

  1. Your overall design approach.

Your design specification should include as a minimum a text description, a system block diagram, state diagram(s), address decoding details and logic diagram(s) of any special functions you plan to implement as well as a table of components (called a bill of materials (BOM) in manufacturing circles).

  1. (30 pts) Your report should include the following
    • Your completed schematics drawn using Mentor Graphics Design Architect
    • Quicksim-II simulation results to evaluate the performance of your design.
    • Your stimulus waveform generation code
    • Exhibit the following minimum circuit functionality i. Show a read from EEPROM, ii. a write to RAM (both 8-bit and 16-bit), iii. a read from the same location of RAM (both 8-bit and 16-bit), iv. a read from an initialized RAM location (both 8-bit and 16-bit), v. a write to Port A (of 82C55A-2), vi. a read from Port B (of 82C55A-2), vii. and a read/write to Port C (of 82C55A-2).
    • Include any VHDL or equivalent source files for the chosen glue logic device in your design,
    • Tutorial information on the use of these programs is in the class notes and for 80186 processor at jason path:/user/class/ee475/tutorl86.txt.
  2. (30 points) Show hand-calculated derivations and satisfy timing design equations for each of the following situations. Calculate any WAIT periods necessary between microprocessor, EPROM, RAM and 82C55A-2. i. Read access of the RAM, EEPROM, and 82C55A-2. ii. Write access of the RAM and 82C55A-2. iii. Show if the 82C55A-2 must be buffered with a transceiver. iv. Check all Tri-state bus contention possibilities involving RAM vs. EEPROM, RAM/EEPROM vs. 74AL5245A, and 82C55A-2 vs. 74ALS245A.
  3. (20 points) The design and simulation of your chosen Input/Output device or circuit and its interaction with the microprocessor based system. This includes documentation of the design of the device that includes VHDL code or schematics of the circuit, the symbol created for the main schematics and quicksim simulation showing the complete operation and interaction of the input/output circuit with the microprocessor, memory, CPLD etc.
  4. (10 points) Writing competency will count for the remaining points. Pay attention to spelling, grammar, organization, and clarity. Write about such things as how the RAM was accommodated into the design, what were the results of the timing analyses, and include how values were derived for any configuration registers