The Illinois Institute of Technology Computer Science and Computer Engineering
courses are filled with many projects designed to enhance our understanding of the
computing realm. Through these hands on experience projects, all students begin to fully
appreciate the basic logic hidden under the façade of all complex computer hardware.
One such project, which I believe epitomizes this concept, is the CS350-Illinois Institute
of Technology Eight-Bit Reduced Instruction Set Computer (IITER) Project. In layman’s
terms the purpose of the IITER project is to build a simple Computer Processing Unit
(CPU). As anyone who is even slightly computer literate understands is the so called
“brain” of any computer. I will, in the following paragraphs, attempt to convey the
design schematics we implemented, as well as, some of the problems we encountered and
how we solved them. This will then be followed by what our team believes is of utmost
importance: what we learned from this implementation.
I would like to first and foremost begin with a detailed description of the
components used to build a fully functional 8-bit CPU. This CPU is designed to be able
to perform such functions as adding, subtracting, and and/or comparisons. One of the
first things that we learned was that the heart of any CPU is the Arithmetic Logic Unit
(ALU). The ALU we implemented was derived from eight one-bit adders, which all have
the capability to be inverted making subtraction possible. The 8-bit ALU also contains
an output with a constant value of zero allowing branching instructions to be possible.
The other major components of our CPU are briefly described below:
Read Only Memory: The ROM is used to download the .mif file, which is
produced by our assembler program: this instruction file is stored in memory.
Program Counter (PC): The PC stores the current 8-bit address and increments
it by one each time an instruction is read, that is unless the instruction is a branch.
If this is the case the PC loads the new address into the ROM.
Instruction Register (IR): The IR is used to hold the current instruction being
processed within our CPU.
Random Access Memory (RAM): The RAM is used to store data in the
memory and has the capability to output the stored data or change the values
within the memory.
Register File (RF): The RF stores values into four registers which we
implemented, all arithmetic must be done using these four registers. Hence our
RF decodes which register should be written to or read from.
Decoder (DEC): The DEC is the component, which controls all the dataflow.
The ability to control all multiplexors allows the DEC to decide which data in the
16-bit instruction is to be used as sources, destinations, or if an immediate value is
to be taken into consideration.
