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CS 150, Fall 2001
Midterm
Dr. Vivek Subramanian
Problem
You are given a negative edge triggered D flip-flop as shown on page 1-19 of the notes on sequential logic.
a) Design the combinational logic necessary to convert this flip-flop into a negative edge-triggered J-K flip-flop. Leave your solution in sum-of-products form. Write out the equation for the combinational logic block, and draw the block connected to the FF below.
Equation:
b) Assume the setup and hold times for the D-FF above are 20ns and 10ns respectively. What is the minimum propagation delay for the D-FF for it to meet correct timing criteria? Why?
c) Suppose the propagation delay for the D-FF is 20ns and the clock frequency is 10 MHZ. What is the maximum delay per gate allowed in the sum-of-products combinational logic block that you designed? Give a reason for your answer, and show your calculations. Assume that all gates in your combination block have identical delay. Also assume that J' and K' are available for free (i.e., no delay in inverting the J and K signals).
d) Recalculate the SOP equation describing the combinational logic block assuming that you must now also implement a synchronous reset signal.
e) Suppose you are to implement the J-K flip-flop with synchronous reset from above in a Xilinx CLB. Mark the active blocks and multiplexer paths on the diagram below.
CS 150, Fall 2001 Midterm #1 Dr. Vivek Subramanian 1
f) How many J-K FF's can be implemented per CLB?
g) Suppose you wanted to implement a J-K FF with synchronous set and reset using a full SOP form. Now, how many J-K FFs can be implemented per CLB?
Problem
You are implementing the brains for a "smart" washing machine. The washing machine works in the following manner:
When you press "Start" after loading in the clothes, the washing machine determines the load size (Medium / Large) and then dispenses the appropriate amount of water and detergent.
- The machine then washes the clothes for 10 minutes. The machine then rinses the clothes for 10 minutes. If the effluent is dirty at the end of the rinse, the machine repeates the dispense, wash + rinse cycle, but for no more than a total of 3 cycles.
The machine then spin-dries the clothes until it detects no water discharge, but for not more than 20 minutes.
Inputs:
START Button MEDIUM load sensor LARGE load sensor DIRTY effluent sensor WET water discharge sensor T1DONE = 60 min timer T2DONE = 10 min timer
Outputs:
MEDIUM water + soap dispense LARGE water + soap dispense WASH cycle actuator RINSE cycle actuator DRY cycle actuator T1START 60 min timer start T2START 10 min timer start
Draw a Mealy machine FSM for this system.
- 11: The shift register toggles all its bits, i.e., all ones become zeroes and vice versa
Draw the FSM diagram for this shift register.
Posted by HKN (Electrical Engineering and Computer Science Honor Society)
University of California at Berkeley
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