Classification of Instructions - Computer Architecture - Lecture Slides, Slides of Computer Architecture and Organization

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1

Classification of instructions

• 4-address instructions
• 3-address instructions
• 2-address instructions
• 1-address instructions
• 0-address instructions

2

Classification of instructions

(continued…)

• The 4-address instruction

specifies the two source

operands, the destination

operand and the address of the

next instruction

op code destination source 1 source 2 next address

4

Classification of instructions

(continued…)

• A 2-address instruction overwrites

one operand with the result

• One field serves two purposes

op code destination source 1

source 2

5

Classification of instructions

(continued…)

• A 1-address instruction has a

dedicated CPU register, called

the accumulator, to hold one

operand & the result –No address

is needed to specify the

accumulator

op code source 2

7

Comparison of

instruction formats

As an example assume:

• that a single byte is used for the op

code

• the size of the memory address

space is 16 Mbytes

• a single addressable memory unit is a

byte

• Size of operands is 24 bits
• Data bus size is 8 bits Docsity.com

8

Comparison of

instruction formats

(continued…)

• We will use the following two

parameters to compare the five

instruction formats mentioned before

• Code size

 Has an effect on the storage requirements

• Number of memory accesses

 Has an effect on execution time

10

3-address instruction

• Code size = 1+3+3+3 = 10 bytes

• No of bytes accessed from memory

10 bytes for instruction fetch +

6 bytes for source operand fetch +

3 bytes for storing destination operand

Total = 19 bytes

1 byte 3 bytes 3 bytes 3 bytes

op code destination source 1 source 2

11

2-address instruction

• Code size = 1+3+3 = 7 bytes

• No of bytes accessed from memory

7 bytes for instruction fetch +

6 bytes for source operand fetch +

3 bytes for storing destination operand

Total = 16 bytes

op code destination source 1

source 2

1 byte 3 bytes 3 bytes

13

0-address instruction

• Code size = 1= 1 bytes

• # of bytes accessed from memory

1 bytes for instruction fetch +

6 bytes for source operand fetch +

3 bytes for storing destination operand

Total = 10 bytes

1 byte

op code

14

Summary

Instruction Format Code

size

Number of

memory bytes

4 - address instruction 13 22

3 - address instruction 10 19

2 - address instruction 7 16

1 - address instruction 4 7

0 - address instruction 1 10

16

Immediate Addressing Mode

• Data for the instruction is part of

the instruction itself

• No need to calculate any address
• Limited range of operands:

for n bit fields, -2^(n-1) to +(2^(n-1)-1)

17

Immediate addressing mode

Example: lda 123 ***

Op code 123 Memory

No memory access needed

IR

ACC 123

data

:

:

:

:

*** Note we have used the lda instruction as

an example to maintain consistency and to

limit the number of operands to one only

19

Indirect addressing mode

Example: lda [[123]]

Memory

Opcode 123

Address of pointer

Address of data

data

IR

ACC

20

Register (direct) addressing

mode (continued…)

Example: lda R

Op code address of R

Address of data

data

IR

R

R

R

R

ACC

Memory

:

:

:

:

No memory access needed