













































Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
Community
Ask the community for help and clear up your study doubts
Discover the best universities in your country according to Docsity users
Free resources
Download our free guides on studying techniques, anxiety management strategies, and thesis advice from Docsity tutors
An insight into the field of computer architecture, discussing its principles, technology trends, and the importance of abstractions. It covers various topics such as basic principles, data types and addressing modes, instruction set classes, pipelining, and memory hierarchy. The document also introduces the concepts of amdahl's law and golden handcuffs.
Typology: Study notes
1 / 53
This page cannot be seen from the preview
Don't miss anything!
Credit where credit’s due: Some materials adapted with permission from Patterson, D. Slides for CS252, Graduate Computer Architecture. ©2001 UCB. Some materials adapted with permission from Koppelman, D. Slides for ECE4720 Computer Architecture. ©2003 LSU. Some materials adapted from Hennessy, J. L. and Patterson, D. A. Computer Architecture, A Quantitative Approach, 3rd^ ed. All other material is © 2007 Dave Archer, Portland State University
Course Topics
l Basic principles, technology trends l Abstractions – the interface to the machine l Data types and addressing modes l Instruction set classes, encoding l Single-processor throughput l Pipelining, hazards, and static scheduling l Traps, faults, and interrupts l Dynamic pipeline scheduling l Speculative execution l Superscalar design l Memory hierarchy (ok, caches ) l More memory hierarchy (ok, virtual memory ) l Multi-processor implications for throughput l Multiprocessors: introduction l Multiprocessors: memory coherence, synchronization
Computer Architecture Is…
l To meet goals of throughput, cost/performance, power, …
l To guide Compiler engineers, OS engineers, IC designers
l To promote synergy, solidify market control
1 Speedupoverall = (1-F) + F/Sf
1
Speedupoverall =
k=
n
Note that lim S = Sf
(make the common case fast)
F ‡ 1
Note that lim S = 1/(1-F)
(law of diminishing returns)
Sf ‡ 8
Example
l Suppose 40% of instructions in a program
can be made to run twice as fast
l How much faster is the whole program?
A (more complex) Example
l Suppose
l How much faster is the whole program?
A (more complex) Example
l Suppose
l How much faster is the whole program?
1 Soverall = .1/3 + .3/5 + .4/8 + .2/
= 1/.343 = 2.
Golden Handcuffs
l Example: “x86” l 1978 – Intel introduces 8086, 8088 l 16-bit addressing l 4.77MHz, 16-bit (8086), 8-bit (8088) external interface l 1985: debut of the 80386 l 32-bit addressing l Up to 33 MHz clock speed l 1989: 80486 DX l Integrated FPU, on board cache, 25-100 MHz l …MMX, 64-bit extensions, and on, and on… l 2007 example: Quad-core Intel Xeon 5300-series processor
l ISA, memory model, data types common across 30 years
l Pain happens when people forget – e.g. Itanium®
Computer Architecture Is…
l To meet goals of throughput, cost/performance, power, …
l To guide Compiler engineers, OS engineers, IC designers
l To promote synergy, solidify market control
Disks: Archaic vs. Modern
l Seagate 373453, 2003 l 15000 RPM (4X) l 73.4 GBytes (2500X) l Tracks/Inch: 64000 (80X) l Bits/Inch: 533,000 (60X) l Four 2.5” platters (in 3.5” form factor) l Bandwidth: 86 MBytes/sec (140X) l Latency: 5.7 ms (8X) l Cache: 8 MBytes
l CDC Wren I, 1983
l 3600 RPM
l 0.03 GBytes capacity
l Tracks/Inch: 800
l Bits/Inch: 9550
l Three 5.25” platters
l Bandwidth: 0.6 MBytes/sec
l Latency: 48.3 ms
l Cache: none
(latency = simple operation w/o contention BW = best-case)
1
10
100
1000
10000
1 10 100 Relative Latency Improvement
Relative BW Improve ment
Disk
(Latency improvement = Bandwidth improvement)
l Performance Milestones l Memory Module: 16bit plain DRAM, Page Mode DRAM, 32b, 64b, SDRAM, DDR SDRAM (4x,120x) l Disk: 3600, 5400, 7200, 10000, 15000 RPM (8x, 143x)
(latency = simple operation w/o contention BW = best-case)
1
10
100
1000
10000
1 10 100 Relative Latency Improvement
Relative BW Improve ment
Memory (^) Disk
(Latency improvement = Bandwidth improvement)
LANs: Archaic vs. Modern
l Ethernet 802. l Year of Standard: 1978 l 10 Mbits/s link speed l Latency: 3000 μsec l Shared media l Coaxial cable
l Ethernet 802.3ae l Year of Standard: 2003 l 10,000 Mbits/s (1000X) link speed l Latency: 190 μsec (15X) l Switched media l Category 5 copper wire
Coaxial Cable:
Copper core
Insulator
Braided outer conductor
Plastic Covering
Copper, 1mm thick, twisted to avoid antenna effect
Twisted Pair:
"Cat 5" is 4 twisted pairs in bundle