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Correcting Instruction Control Signals in a CPU - Prof. Larry Wilson, Assignments of Computer Architecture and Organization

An error in a previous analysis where the memread and alusrc control signals were incorrectly suggested to be used instead of memtoreg in controlling the mux in a cpu. That for r-format and lw instructions, memread and alusrc have the same values as memtoreg. However, for sw and beq instructions, they differ, but since regwrite is 0 for both, memtoreg does not matter. The document suggests that all instructions would work properly if memread or alusrc were used to control the memtoreg mux. However, it is noted that this cannot be done for memwrite or alusrc as it would lead to unwanted consequences. The document concludes by admitting an error was made in class due to focusing on figure 5.17 instead of considering all alternatives.

Typology: Assignments

Pre 2010

Uploaded on 02/12/2009

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Key
HW 5.13 in the text.
We can do better than the answer we gave in class by using figure 5.18.
In figure 5.18 we can see that the MemRead column has the same values as the
Memtoreg column for R-format and lw instructions. However for sw and beq they differ,
however for both of those cases the Memtoreg does not matter ( since regwrite is 0).
Thus all the instructions would work properly if MemRead were also used to control the
Memtoreg MUX.
In figure 5.18 we can see that the AluSrc column has the same values as the Memtoreg
column for R-format and lw instructions. However for sw and beq they differ, however
for both of those cases the Memtoreg does not matter ( since regwrite is 0). Thus all the
instructions would work properly if AluSrc were also used to control the Memtoreg
MUX.
However we cannot substitute ALUSrc for MemWrite since this would cause the CPU to
write into memory on a lw instruction and we do not want that to happen. Also we could
not substitute the Memwite control signal for the ALUSrc signal as the input to the ALU
would then be wrong on a lw instruction. NOTE THAT WE DID THIS PART WRONG
IN CLASS BECAUSE WE CONCENTRATED ON FIGURE 5.17 AND DID NOT
THINK THROUGH ALL THE ALTERNATIVES.

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Key HW 5.13 in the text. We can do better than the answer we gave in class by using figure 5.18. In figure 5.18 we can see that the MemRead column has the same values as the Memtoreg column for R-format and lw instructions. However for sw and beq they differ, however for both of those cases the Memtoreg does not matter ( since regwrite is 0). Thus all the instructions would work properly if MemRead were also used to control the Memtoreg MUX. In figure 5.18 we can see that the AluSrc column has the same values as the Memtoreg column for R-format and lw instructions. However for sw and beq they differ, however for both of those cases the Memtoreg does not matter ( since regwrite is 0). Thus all the instructions would work properly if AluSrc were also used to control the Memtoreg MUX. However we cannot substitute ALUSrc for MemWrite since this would cause the CPU to write into memory on a lw instruction and we do not want that to happen. Also we could not substitute the Memwite control signal for the ALUSrc signal as the input to the ALU would then be wrong on a lw instruction. NOTE THAT WE DID THIS PART WRONG IN CLASS BECAUSE WE CONCENTRATED ON FIGURE 5.17 AND DID NOT THINK THROUGH ALL THE ALTERNATIVES.