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8086 Instruction Set By Er. Swapnil V. Kaware, Lecture notes of Microprocessors

8086 Instruction Set By Er. Swapnil V. Kaware

Typology: Lecture notes

2019/2020

Uploaded on 04/29/2020

svkaware
svkaware 🇮🇳

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Instruction Set of 8086
Microprocessor
For More Contents, do subscribe to my channel on
you tube as,
Tech_Guru Swapnil Kaware
Microprocessor Notes by Er. Swapnil V. Kaware (svkaware@yahoo.co.in)
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Download 8086 Instruction Set By Er. Swapnil V. Kaware and more Lecture notes Microprocessors in PDF only on Docsity!

Instruction Set of 8086

Microprocessor

For More Contents, do subscribe to my channel on

you tube as,

” Tech_Guru Swapnil Kaware ”

Microprocessor Notes by Er. Swapnil V. Kaware (svkaware@yahoo.co.in)

Instruction Set of 8086 Microprocessor

Presented By,

Er. Swapnil Kaware,

M.E. (Electronics & Telecommunication),

svkaware@yahoo.co.in

www.slideshare.net/svkaware

  • Assembler:- it converts the instruction into sequence of

binary bits, so that this bits can be read by the

processor.

  • Mnemonics:- these are the symbolic codes for either

instructions or commands to perform a particular

function.

  • E.g. MOV, ADD, SUB etc.

Instruction set basics

Microprocessor Notes By, Er. Swapnil

Instruction Formats

  • In 8086 microprocessor there are following six types of

instruction formats.

(1). 1-Byte instruction,

(2). Register to register,

(3). Register to/from memory with no displacement,

(4). Register to/from memory with displacement,

(5). Immediate operand to register,

(6). Immediate operand to memory with 16-Bit

displacement.

Microprocessor Notes By, Er. Swapnil

  • The instruction is 2-byte long in size.
  • First byte of code denotes opcode & width of operand.
  • Second byte denotes register operands & R/M field.
  • ‘REG’ field denotes type of register used.
  • ‘R/M’ field denotes register or memory location used.
  • If ‘W’ field is ‘0’ then operand is of 8 - bits, & If ‘W’ field

is ‘1’ then operand is of 16 - bits.

( 2 ). Register to Memory

OPCODE W 11 REG R/M

D 7 D 1 D0 D 7 D 5 D 2 D

D 6 D 3

Microprocessor Notes By, Er. Swapnil

(3). Register to/from memory with no

Displacement

  • The instruction is 2 - byte long in size.
  • First byte of code denotes opcode & width of operand.
  • Second byte denotes mod,register operands & R/M

field.

  • MOD field denotes type of addressing mode used.

OPCODE W MOD REG R/M

D 7

D 1 D 0 D 7 D6 D 5 D 3 D2 D

Microprocessor Notes By, Er. Swapnil

  • The instruction is 4-byte long in size.
  • First byte of code denotes opcode.
  • Second byte denotes opcode,R/M field.
  • Third byte denotes lower byte of data.
  • fourth byte denotes higher byte of data.

(5). Immediate operand to register

OPCODE 11 REG R/M

D 0

Lower Byte of

data

Higher Byte of data

D 7 D7 D6 D 5 D 3 D2 D0 D 7 D 0 D7 D

Microprocessor Notes By, Er. Swapnil

  • The instruction is 5 or 6-byte long in size.
  • First byte of code denotes opcode.
  • Second byte denotes register mod,opcode & R/M field.
  • Third byte denotes lower byte of displacement.

(6). Immediate operand to memory with

16 - bit displacement

OPCODE MOD OPCODE R/M

D

Lower Byte of

displacement

D 7 D 7 D6 D5 D 3 D2 D 0 D7 D

Higher Byte of

displacement

Lower Byte of

data

Higher Byte of

data

D 7 D7 D0 D 7 D D

Microprocessor Notes By, Er. Swapnil

Addressing modes & corresponding

MOD,REG & R/M field

Microprocessor Notes By, Er. Swapnil

Addressing Modes of 8086

Microprocessor

  • (1). Immediate,
  • (2). Direct,
  • (3). Register,
  • (4). Register Indirect,
  • (5). Indexed,
  • (6). Register Relative,
  • (7). Based Indexed,
  • (8). Relative Based Indexed.
  • (9). Intrasegment Direct Mode.
  • (10). Intrasegment Indirect Mode.
  • (11). Intersegment Direct.
  • (12). Intersegment Indirect.

Microprocessor Notes By, Er. Swapnil

(1). Data copy/transfer instructions.

  • (1). MOV Destination, Source;
  • There will be transfer of data from source to destination.
  • Source can be register, memory location or immediate

data.

  • Destination can be register or memory operand.
  • Both Source and Destination cannot be memory location

or segment registers at the same time.

  • E.g.
  • (1). MOV CX, 037A H;
  • (2). MOV AL, BL;
  • (3). MOV BX, [0301 H];

Microprocessor Notes By, Er. Swapnil

BX 2000H AX 2000H

BEFORE EXECUTION AFTER EXECUTION

MOV BX,AX;

AH AL
BH BL
CH CL
DH DL
AH AL
BH BL
CH CL 40
DH DL

MOV CL,M;

BEFORE EXECUTION AFTER EXECUTION

(1). Data copy/transfer instructions.

  • (2). Push Source;
  • Source can be register, segment register or memory.
  • This instruction pushes the contents of specified source

on to the stack.

  • In this stack pointer is decremented by 2.
  • The higher byte data is pushed first (SP-1).
  • Then lower byte data is pushed (SP-2).
  • E.g.:
  • (1). PUSH AX;
  • (2). PUSH DS;
  • (3). PUSH [5000H];

Microprocessor Notes By, Er. Swapnil

INITIAL POSITION

DECREMENTS SP & STORES HIGHER BYTE

HIGHER BYTE

DECREMENTS SP & STORES LOWER BYTE

LOWER BYTE

HIGHER BYTE

(1) STACK POINTER

(2) STACK POINTER

(3) STACK POINTER

Microprocessor Notes By, Er. Swapnil