80386 Microprocessor Architecture, Lecture notes of Microprocessors

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80386 MICROPROCESSOR

ARCHITECTURE

Prof. P. C. Patil Department of Computer Engg Sandip Institute of Engineering & Management Nashik pc.patil@siem.org.in

MICROPROCESSOR

UOP S.E.COMP (SEM-II)

Introduction

Block Diagram

 These signals are separated in Six major groups :

1. Bus / Memory Interface Unit
2. Code Prefetch Unit
3. Instruction Decode Unit
4. Execution Unit
5. Segmentation Unit
6. Paging Unit

Pin Discription

Bus Status Signals :

 The bus status signals decide the type of bus cycle to be

performed. These signals are :

_1. Address status

2. Write/Read
3. Memory/IO
4. Data/Control
5. LOCK_

Pin Discription

Register Set

General Purpose Register

Segment Registers

1. CS (Code Segment) : holds the base address of the currently active code segment.
2. DS (Data Segment) : is used to hold the address of currently active data segment.
3. ES (Extra Segment) FS, & GS : are used as general data segment registers.  These registers hold the base addresses of three different memory segments.  These segments are referred as to Extra Segments.
4. SS (Stack Segment) : The base address of the currently active. stack segment is contained in the SS register.

Segment Register

lndex, Pointers & Base Registers