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Chapter 6, problem 1 : For each of the following state tables, show a state diagram and complete the timing trace as far as possible (even after the input is no longer known).
(a)
Since q 1 q2 go through all possible two bit combinations, we have four states to account for in our state diagram. Since the states do not correspond to the output values for z , we have to take into account the input variable x in the output equation. We can come up with the following state transition diagram (labels at the arrows denote the x/z pair):
The timing trace can be completed as follows:
x 1 0 1 1 0 0 0 1 q 1 0 0 0 1 0 1 0 0 1 0 1 0 q 2 0 0 1 1 1 0 0 1 1 1 z 1 0 0 0 0 1 0 0? 0
After the last input is known, state 11 always goes to 01 independent of the input. Then 01 goes to either 10 or 11; thus q 1 = 1. Finally, both 10 and 11 go to either 00 or 01, making q 1 = 0. The output depends upon the input in state 11, but is 0 for both values of x in state 01. Generally, we do not worry about values once one is not known; thus the last z may be omitted.
*q 1 q 2 * z q 1 q 2 x = 0 x = 1 x = 0 x = 1 0 0 0 1 0 0 0 1 0 1 1 0 1 1 0 0 1 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0
1/1 S 0 S 1 S 2 S 3
Chapter 6, problem 3 : For the input shown below, show the flip flop outputs (assume negative edge triggered flip flops)
Clock D or T CLR' (b and e) CLR' PRE'
a) Assume a D flip-flop without a clear or preset
b) Assume a D flip-flop with active low clear
c) Assume a D flip-flop with active low clear and preset inputs
d) Assume a T flip-flop,and the Q is initially 0 (no clear or preset)
e) Assume a T flip-flop with active low clear
Chapter 6, problem 5 : Considering the following circuit, complete the timing diagram if the flip flop is:
a) A D flip-flop (assume Q = 0 initially)
From the circuit above, we see that IN = D = xQ' + x'Q = x ⊕ Q. When x = 0 then D = Q and when x = 1 then D = Q'. Thus the output holds its state whenever x = 0 and toggles whenever x = 1. Therefore, this circuit behaves like a T flip-flop, where x serves as the T input. This behavior allows us to complete the timing diagram:
CLK x Q Q'
b) A T flip-flop (assume Q = 0 initially)
As in part (a), IN = T = x ⊕ Q. When x = 0 and Q = 0, then T = 0 and the output holds its state at 0. When x = 0 and Q = 1, then T = 1 and the output toggles its state to 0. When x = 1 and Q = 0, then T = 1 and the output toggles its state to 1. When x = 1 and Q = 1, then T = 0 and the output holds its state at 1. So, whenever x = 0, the output goes to 0 and whenever x = 1 the output goes to 1. Thus, this circuit behaves like a D flip-flop, with x serving as the D input.
CLK x Q Q'
Chapter 6, problem 6 : We have a new type of flip flop with inputs A and B. if A = 0, then Q* = B; if A = 1, Q* = B'.
(a) Show the state diagram for this flip flop.
To determine the state diagram for this flip flop, it is advisable to set up a behavioral table first, indicating all possible input combinations and output states before and after an input transition:
The flip flop has two states S 0 and S 1 , which can be represented by a 0 or a 1 at the output. From the description and the behavioral table we see that the output transition is independent of the previous state Q. Our state diagram looks like that:
(b) Write an equation for Q* in terms of A, B and Q.
We can use a K-Map to determine the algebraic expression for Q*:
Q
AB
00^0
11^0
A B Q Q*
S 1
0 0 S 0
Q* = A'B + AB' = A + B
Chapter 6, problem 8: For the following circuit and input string: i. Construct a state table ii. Show a timing trace for the flip-flops and the output. Assume an initial value of 0 on each flip-flop.
a)
From this circuit, we can see that Q1* = X + Q2', Q2* = Q1, and Z = Q1 + Q2'. This information can be used to construct the state transition table, and the table can be used to complete the timing trace.
Q1 Q2 Q1* Q2* (X = 0) Q1* Q2* (X = 1) Z
X 0 0 1 1 0 0 1 1 0
Q1 0 1 1 1 1 0 0 1 1 0? 1?
Q2 0 0 1 1 1 1 0 0 1 1 0? 1
Z 0 0 0 0 0 1 0 0 0 1 0 0?
