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Computer Organization (0306-550) - Winter 2008
Homework Assignment #2 - Due January 8
Show all intermediate steps clearly and legibly to obtain full credit.
1. Assume that the code given in Exercise 2.30 (page 150) in the textbook is run on
a CPU with a clock frequency of 1.6 GHz, that requires the following number of
cycles for each instruction.
Instruction Cycles
add, addi, sll 3
bne 4
lw 7
Ignoring the four instructions before the loops, how many seconds will it take to
execute this code in the worst case?
2. Consider two different CPU implementations of the same instruction set: CPU1
and CPU2. This instruction set has five classes (A, B, C, D, and E) of instructions
whose CPIs for each CPU are given in the table below. CPU1 has a clock rate of
2 GHz, and CPU2 has a clock rate of 2.4 GHz
Class CPI1CPI2
A 1 3
B 3 3
C 4 3
D 5 4
E 6 4
a. What are the peak MIPS ratings of CPU1 and CPU2 ?
b. If the number of instructions executed in a certain program is divided equally
among these instruction classes except for class A, which occurs five times as
often as each of the other classes, which CPU implementation is faster for this
program (i.e., CPU1 or CPU2), and by how much?
3. Exercise 4.10, page 273 in the textbook.
4. Consider program P running on a 1-GHz machine M in 10 seconds. Someone
optimizes P by replacing each of 4x108 instances of multiplying a value x by 2
(mult x,x,2) each with a single add instruction (add x,x,x) and by replacing all
instances of multiplying by 4 (mult x,x,4) each with a single shift instruction
(sll x,x,2). The optimized program P′ runs in 8 seconds on the same machine.
If the CPI of mult is 6, the CPI of add is 2, and the CPI of sll is 1, how
many multiplies by 4 were replaced with sll instructions by the optimization?
